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author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-11-21 17:40:56 +0800 |
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committer | York Sun <yorksun@freescale.com> | 2014-12-11 09:41:53 -0800 |
commit | 290e6e921f255fdee072d21539bbad16b9a3e714 (patch) | |
tree | 37eb3c3e98bf2a03db559b805d8ce40e0f8c4a2f /scripts/Makefile.spl | |
parent | 73a1cb27c0d9e93d97cd7a344fd341f638ba3a2a (diff) | |
download | u-boot-imx-290e6e921f255fdee072d21539bbad16b9a3e714.zip u-boot-imx-290e6e921f255fdee072d21539bbad16b9a3e714.tar.gz u-boot-imx-290e6e921f255fdee072d21539bbad16b9a3e714.tar.bz2 |
ls1021a: adding a secondary core boot address and kick functions
Define the board specific smp_set_cpu_boot_addr() function to set
the start address for secondary cores in the LS1021A specific manner.
Define the board specific smp_kick_all_cpus() functioin to boot a
secondary core. Here the BRR contains control bits for enabling boot
for each core. On exiting HRESET or PORESET, the RCW BOOT_HO field
optionally allows for logical core 0 to be released for booting or to
remain in boot holdoff. All other cores remain in boot holdoff until
their corresponding bit is set.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'scripts/Makefile.spl')
0 files changed, 0 insertions, 0 deletions