Merge branch 'master' of /home/stefan/git/u-boot/u-boot

18 files changed, 266 insertions, 150 deletions

diff --git a/post/cpu/ppc4xx/Makefile b/post/cpu/ppc4xx/Makefile
index f19dc5d..1cfd3bb 100644
--- a/post/cpu/ppc4xx/Makefile
+++ b/post/cpu/ppc4xx/Makefile
@@ -29,6 +29,7 @@ COBJS-$(CONFIG_HAS_POST)	+= cache.o
 COBJS-$(CONFIG_HAS_POST)	+= denali_ecc.o
 COBJS-$(CONFIG_HAS_POST)	+= ether.o
 COBJS-$(CONFIG_HAS_POST)	+= fpu.o
+COBJS-$(CONFIG_HAS_POST)	+= ocm.o
 COBJS-$(CONFIG_HAS_POST)	+= spr.o
 COBJS-$(CONFIG_HAS_POST)	+= uart.o
 COBJS-$(CONFIG_HAS_POST)	+= watchdog.o
diff --git a/post/cpu/ppc4xx/ocm.c b/post/cpu/ppc4xx/ocm.c
new file mode 100644
index 0000000..88aa93e
--- /dev/null
+++ b/post/cpu/ppc4xx/ocm.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2008 Ilya Yanok, EmCraft Systems, yanok@emcraft.com
+ *
+ * Developed for DENX Software Engineering GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+
+/*
+ * This test attempts to verify on-chip memory (OCM). Result is written
+ * to the scratch register and if test succeed it won't be run till next
+ * power on.
+ */
+
+#include <post.h>
+
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define OCM_TEST_PATTERN1	0x55555555
+#define OCM_TEST_PATTERN2	0xAAAAAAAA
+
+#if CONFIG_POST & CFG_POST_OCM
+
+static uint ocm_status_read(void)
+{
+	return in_be32((void *)CFG_OCM_STATUS_ADDR) &
+		CFG_OCM_STATUS_MASK;
+}
+
+static void ocm_status_write(uint value)
+{
+	out_be32((void *)CFG_OCM_STATUS_ADDR, value |
+		(in_be32((void *)CFG_OCM_STATUS_ADDR) &
+			~CFG_OCM_STATUS_MASK));
+}
+
+static inline int ocm_test_word(uint value, uint *address)
+{
+	uint read_value;
+
+	*address = value;
+	sync();
+	read_value = *address;
+
+	return (read_value != value);
+}
+
+int ocm_post_test(int flags)
+{
+	uint   old_value;
+	int    ret = 0;
+	uint  *address = (uint*)CFG_OCM_BASE;
+
+	if (ocm_status_read() == CFG_OCM_STATUS_OK)
+		return 0;
+	for (; address < (uint*)(CFG_OCM_BASE + CFG_OCM_SIZE); address++) {
+		old_value = *address;
+		if (ocm_test_word(OCM_TEST_PATTERN1, address) ||
+				ocm_test_word(OCM_TEST_PATTERN2, address)) {
+			ret = 1;
+			*address = old_value;
+			printf("OCM POST failed at %p!\n", address);
+			break;
+		}
+		*address = old_value;
+	}
+	ocm_status_write(ret ? CFG_OCM_STATUS_FAIL : CFG_OCM_STATUS_OK);
+	return ret;
+}
+#endif /* CONFIG_POST & CFG_POST_OCM */
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index e94d92c..e32020f 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -282,7 +282,7 @@ static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
 #endif
 			if(readback == *testaddr) {
 				post_log ("Memory (address line) error at %08x<->%08x, "
-				  	"XOR value %08x !\n",
+					"XOR value %08x !\n",
 					testaddr, target, xor);
 				ret = -1;
 			}
diff --git a/post/lib_ppc/andi.c b/post/lib_ppc/andi.c
index e3315bf..75ba7a6 100644
--- a/post/lib_ppc/andi.c
+++ b/post/lib_ppc/andi.c
@@ -49,13 +49,13 @@ static struct cpu_post_andi_s
 } cpu_post_andi_table[] =
 {
     {
-    	OP_ANDI_,
+	OP_ANDI_,
 	0x80008000,
 	0xffff,
 	0x00008000
     },
     {
-    	OP_ANDIS_,
+	OP_ANDIS_,
 	0x80008000,
 	0xffff,
 	0x80000000
@@ -79,7 +79,7 @@ int cpu_post_test_andi (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -112,7 +112,7 @@ int cpu_post_test_andi (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/cmp.c b/post/lib_ppc/cmp.c
index 89f754a..8d80f86 100644
--- a/post/lib_ppc/cmp.c
+++ b/post/lib_ppc/cmp.c
@@ -106,7 +106,7 @@ int cpu_post_test_cmp (void)
     for (i = 0; i < cpu_post_cmp_size && ret == 0; i++)
     {
 	struct cpu_post_cmp_s *test = cpu_post_cmp_table + i;
-    	unsigned long code[] =
+	unsigned long code[] =
 	{
 	    ASM_2C(test->cmd, test->cr, 3, 4),
 	    ASM_MFCR(3),
diff --git a/post/lib_ppc/cmpi.c b/post/lib_ppc/cmpi.c
index 0afdd71..92b4d57 100644
--- a/post/lib_ppc/cmpi.c
+++ b/post/lib_ppc/cmpi.c
@@ -106,7 +106,7 @@ int cpu_post_test_cmpi (void)
     for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++)
     {
 	struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i;
-    	unsigned long code[] =
+	unsigned long code[] =
 	{
 	    ASM_1IC(test->cmd, test->cr, 3, test->op2),
 	    ASM_MFCR(3),
diff --git a/post/lib_ppc/cpu_asm.h b/post/lib_ppc/cpu_asm.h
index 1cbaf41..ef6fe61 100644
--- a/post/lib_ppc/cpu_asm.h
+++ b/post/lib_ppc/cpu_asm.h
@@ -191,7 +191,7 @@
 					 ((imm2) << 6) +	\
 					 ((imm3) << 1))
 #define ASM_1O(opcode, off)		((opcode) + (off))
-#define ASM_3O(opcode, bo, bi, off)	((opcode) + 		\
+#define ASM_3O(opcode, bo, bi, off)	((opcode) +		\
 					 ((bo) << 21) +		\
 					 ((bi) << 16) +		\
 					 (off))
diff --git a/post/lib_ppc/rlwimi.c b/post/lib_ppc/rlwimi.c
index 1d8e61e..8662db1 100644
--- a/post/lib_ppc/rlwimi.c
+++ b/post/lib_ppc/rlwimi.c
@@ -53,7 +53,7 @@ static struct cpu_post_rlwimi_s
 } cpu_post_rlwimi_table[] =
 {
     {
-    	OP_RLWIMI,
+	OP_RLWIMI,
 	0xff00ffff,
 	0x0000aa00,
 	8,
@@ -80,7 +80,7 @@ int cpu_post_test_rlwimi (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -20),
@@ -99,7 +99,7 @@ int cpu_post_test_rlwimi (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -20),
@@ -124,26 +124,26 @@ int cpu_post_test_rlwimi (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
+		cr = 0;
+		cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwimi test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
+		cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwimi test %d !\n", i);
 	        }
 	    }
@@ -151,7 +151,7 @@ int cpu_post_test_rlwimi (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/rlwinm.c b/post/lib_ppc/rlwinm.c
index 113e79d..4398a10 100644
--- a/post/lib_ppc/rlwinm.c
+++ b/post/lib_ppc/rlwinm.c
@@ -51,7 +51,7 @@ static struct cpu_post_rlwinm_s
 } cpu_post_rlwinm_table[] =
 {
    {
-   	OP_RLWINM,
+	OP_RLWINM,
 	0xffff0000,
 	24,
 	16,
@@ -77,7 +77,7 @@ int cpu_post_test_rlwinm (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -94,7 +94,7 @@ int cpu_post_test_rlwinm (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -117,26 +117,26 @@ int cpu_post_test_rlwinm (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_21 (code, & cr, & res, test->op1);
+		cr = 0;
+		cpu_post_exec_21 (code, & cr, & res, test->op1);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwinm test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_21 (codecr, & cr, & res, test->op1);
+		cpu_post_exec_21 (codecr, & cr, & res, test->op1);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwinm test %d !\n", i);
 	        }
 	    }
@@ -144,7 +144,7 @@ int cpu_post_test_rlwinm (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/rlwnm.c b/post/lib_ppc/rlwnm.c
index a6684bf..c547bd7 100644
--- a/post/lib_ppc/rlwnm.c
+++ b/post/lib_ppc/rlwnm.c
@@ -52,7 +52,7 @@ static struct cpu_post_rlwnm_s
 } cpu_post_rlwnm_table[] =
 {
    {
-   	OP_RLWNM,
+	OP_RLWNM,
 	0xffff0000,
 	24,
 	16,
@@ -79,7 +79,7 @@ int cpu_post_test_rlwnm (void)
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int reg2 = (reg + 2) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -100,7 +100,7 @@ int cpu_post_test_rlwnm (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -127,26 +127,26 @@ int cpu_post_test_rlwnm (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+		cr = 0;
+		cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwnm test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+		cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at rlwnm test %d !\n", i);
 	        }
 	    }
@@ -154,7 +154,7 @@ int cpu_post_test_rlwnm (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/srawi.c b/post/lib_ppc/srawi.c
index 8c70007..4a3dddb 100644
--- a/post/lib_ppc/srawi.c
+++ b/post/lib_ppc/srawi.c
@@ -49,13 +49,13 @@ static struct cpu_post_srawi_s
 } cpu_post_srawi_table[] =
 {
     {
-    	OP_SRAWI,
+	OP_SRAWI,
 	0x8000,
 	3,
 	0x1000
     },
     {
-    	OP_SRAWI,
+	OP_SRAWI,
 	0x80000000,
 	3,
 	0xf0000000
@@ -79,7 +79,7 @@ int cpu_post_test_srawi (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -96,7 +96,7 @@ int cpu_post_test_srawi (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -118,26 +118,26 @@ int cpu_post_test_srawi (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_21 (code, & cr, & res, test->op1);
+		cr = 0;
+		cpu_post_exec_21 (code, & cr, & res, test->op1);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at srawi test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_21 (codecr, & cr, & res, test->op1);
+		cpu_post_exec_21 (codecr, & cr, & res, test->op1);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at srawi test %d !\n", i);
 	        }
 	    }
@@ -145,7 +145,7 @@ int cpu_post_test_srawi (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/three.c b/post/lib_ppc/three.c
index a7f1a86..3fa513b 100644
--- a/post/lib_ppc/three.c
+++ b/post/lib_ppc/three.c
@@ -53,103 +53,103 @@ static struct cpu_post_three_s
 } cpu_post_three_table[] =
 {
     {
-    	OP_ADD,
+	OP_ADD,
 	100,
 	200,
 	300
     },
     {
-    	OP_ADD,
+	OP_ADD,
 	100,
 	-200,
 	-100
     },
     {
-    	OP_ADDC,
+	OP_ADDC,
 	100,
 	200,
 	300
     },
     {
-    	OP_ADDC,
+	OP_ADDC,
 	100,
 	-200,
 	-100
     },
     {
-    	OP_ADDE,
+	OP_ADDE,
 	100,
 	200,
 	300
     },
     {
-    	OP_ADDE,
+	OP_ADDE,
 	100,
 	-200,
 	-100
     },
     {
-    	OP_SUBF,
+	OP_SUBF,
 	100,
 	200,
 	100
     },
     {
-    	OP_SUBF,
+	OP_SUBF,
 	300,
 	200,
 	-100
     },
     {
-    	OP_SUBFC,
+	OP_SUBFC,
 	100,
 	200,
 	100
     },
     {
-    	OP_SUBFC,
+	OP_SUBFC,
 	300,
 	200,
 	-100
     },
     {
-    	OP_SUBFE,
+	OP_SUBFE,
 	100,
 	200,
 	200 + ~100
     },
     {
-    	OP_SUBFE,
+	OP_SUBFE,
 	300,
 	200,
 	200 + ~300
     },
     {
-    	OP_MULLW,
+	OP_MULLW,
 	200,
 	300,
 	200 * 300
     },
     {
-    	OP_MULHW,
+	OP_MULHW,
 	0x10000000,
 	0x10000000,
 	0x1000000
     },
     {
-    	OP_MULHWU,
+	OP_MULHWU,
 	0x80000000,
 	0x80000000,
 	0x40000000
     },
     {
-    	OP_DIVW,
+	OP_DIVW,
 	-20,
 	5,
 	-4
     },
     {
-    	OP_DIVWU,
+	OP_DIVWU,
 	0x8000,
 	0x200,
 	0x40
@@ -174,7 +174,7 @@ int cpu_post_test_three (void)
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int reg2 = (reg + 2) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -195,7 +195,7 @@ int cpu_post_test_three (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -221,26 +221,26 @@ int cpu_post_test_three (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+		cr = 0;
+		cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at three test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+		cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at three test %d !\n", i);
 	        }
 	    }
@@ -248,7 +248,7 @@ int cpu_post_test_three (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/threei.c b/post/lib_ppc/threei.c
index bbb4f50..89f8fc8 100644
--- a/post/lib_ppc/threei.c
+++ b/post/lib_ppc/threei.c
@@ -51,25 +51,25 @@ static struct cpu_post_threei_s
 } cpu_post_threei_table[] =
 {
     {
-    	OP_ORI,
+	OP_ORI,
 	0x80000000,
 	0xffff,
 	0x8000ffff
     },
     {
-    	OP_ORIS,
+	OP_ORIS,
 	0x00008000,
 	0xffff,
 	0xffff8000
     },
     {
-    	OP_XORI,
+	OP_XORI,
 	0x8000ffff,
 	0xffff,
 	0x80000000
     },
     {
-    	OP_XORIS,
+	OP_XORIS,
 	0x00008000,
 	0xffff,
 	0xffff8000
@@ -93,7 +93,7 @@ int cpu_post_test_threei (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -113,7 +113,7 @@ int cpu_post_test_threei (void)
 	    ulong res;
 	    ulong cr;
 
- 	    cr = 0;
+	    cr = 0;
 	    cpu_post_exec_21 (code, & cr, & res, test->op1);
 
 	    ret = res == test->res && cr == 0 ? 0 : -1;
@@ -126,7 +126,7 @@ int cpu_post_test_threei (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/threex.c b/post/lib_ppc/threex.c
index 6aac937..1dfcc2c 100644
--- a/post/lib_ppc/threex.c
+++ b/post/lib_ppc/threex.c
@@ -53,73 +53,73 @@ static struct cpu_post_threex_s
 } cpu_post_threex_table[] =
 {
     {
-    	OP_OR,
+	OP_OR,
 	0x1234,
 	0x5678,
 	0x1234 | 0x5678
     },
     {
-    	OP_ORC,
+	OP_ORC,
 	0x1234,
 	0x5678,
 	0x1234 | ~0x5678
     },
     {
-    	OP_XOR,
+	OP_XOR,
 	0x1234,
 	0x5678,
 	0x1234 ^ 0x5678
     },
     {
-    	OP_NAND,
+	OP_NAND,
 	0x1234,
 	0x5678,
 	~(0x1234 & 0x5678)
     },
     {
-    	OP_NOR,
+	OP_NOR,
 	0x1234,
 	0x5678,
 	~(0x1234 | 0x5678)
     },
     {
-    	OP_EQV,
+	OP_EQV,
 	0x1234,
 	0x5678,
 	~(0x1234 ^ 0x5678)
     },
     {
-    	OP_SLW,
+	OP_SLW,
 	0x80,
 	16,
 	0x800000
     },
     {
-    	OP_SLW,
+	OP_SLW,
 	0x80,
 	32,
 	0
     },
     {
-    	OP_SRW,
+	OP_SRW,
 	0x800000,
 	16,
 	0x80
     },
     {
-    	OP_SRW,
+	OP_SRW,
 	0x800000,
 	32,
 	0
     },
     {
-    	OP_SRAW,
+	OP_SRAW,
 	0x80000000,
 	3,
 	0xf0000000
     },
     {
-    	OP_SRAW,
+	OP_SRAW,
 	0x8000,
 	3,
 	0x1000
@@ -144,7 +144,7 @@ int cpu_post_test_threex (void)
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int reg2 = (reg + 2) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -165,7 +165,7 @@ int cpu_post_test_threex (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -24),
@@ -191,26 +191,26 @@ int cpu_post_test_threex (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
+		cr = 0;
+		cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at threex test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
+		cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at threex test %d !\n", i);
 	        }
 	    }
@@ -218,7 +218,7 @@ int cpu_post_test_threex (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/lib_ppc/twox.c b/post/lib_ppc/twox.c
index 7417a36..519b432 100644
--- a/post/lib_ppc/twox.c
+++ b/post/lib_ppc/twox.c
@@ -51,32 +51,32 @@ static struct cpu_post_twox_s
 } cpu_post_twox_table[] =
 {
     {
-    	OP_EXTSB,
+	OP_EXTSB,
 	3,
 	3
     },
     {
-    	OP_EXTSB,
+	OP_EXTSB,
 	0xff,
 	-1
     },
     {
-    	OP_EXTSH,
+	OP_EXTSH,
 	3,
 	3
     },
     {
-    	OP_EXTSH,
+	OP_EXTSH,
 	0xff,
 	0xff
     },
     {
-    	OP_EXTSH,
+	OP_EXTSH,
 	0xffff,
 	-1
     },
     {
-    	OP_CNTLZW,
+	OP_CNTLZW,
 	0x000fffff,
 	12
     },
@@ -99,7 +99,7 @@ int cpu_post_test_twox (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long code[] =
+	    unsigned long code[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -116,7 +116,7 @@ int cpu_post_test_twox (void)
 		ASM_LWZ(stk, 1, -4),
 		ASM_BLR,
 	    };
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -138,26 +138,26 @@ int cpu_post_test_twox (void)
 
 	    if (ret == 0)
 	    {
- 	    	cr = 0;
-	    	cpu_post_exec_21 (code, & cr, & res, test->op);
+		cr = 0;
+		cpu_post_exec_21 (code, & cr, & res, test->op);
 
-	    	ret = res == test->res && cr == 0 ? 0 : -1;
+		ret = res == test->res && cr == 0 ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at twox test %d !\n", i);
-	    	}
+		}
 	    }
 
 	    if (ret == 0)
 	    {
-	    	cpu_post_exec_21 (codecr, & cr, & res, test->op);
+		cpu_post_exec_21 (codecr, & cr, & res, test->op);
 
-	    	ret = res == test->res &&
+		ret = res == test->res &&
 		      (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
 
-	    	if (ret != 0)
-	    	{
+		if (ret != 0)
+		{
 	            post_log ("Error at twox test %d !\n", i);
 	        }
 	    }
@@ -165,7 +165,7 @@ int cpu_post_test_twox (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }
diff --git a/post/post.c b/post/post.c
index c016c3a..d31829b 100644
--- a/post/post.c
+++ b/post/post.c
@@ -238,14 +238,20 @@ static int post_run_single (struct post_test *test,
 		if (test_flags & POST_PREREL) {
 			if ((*test->test) (flags) == 0)
 				post_log_mark_succ ( test->testid );
-			else if (test_flags & POST_CRITICAL)
-				gd->flags |= GD_FLG_POSTFAIL;
+			else {
+				if (test_flags & POST_CRITICAL)
+					gd->flags |= GD_FLG_POSTFAIL;
+				if (test_flags & POST_STOP)
+					gd->flags |= GD_FLG_POSTSTOP;
+			}
 		} else {
 		if ((*test->test) (flags) != 0) {
 			post_log ("FAILED\n");
 			show_boot_progress (-32);
 			if (test_flags & POST_CRITICAL)
 				gd->flags |= GD_FLG_POSTFAIL;
+			if (test_flags & POST_STOP)
+				gd->flags |= GD_FLG_POSTSTOP;
 		}
 		else
 			post_log ("PASSED\n");
@@ -271,6 +277,9 @@ int post_run (char *name, int flags)
 	if (name == NULL) {
 		unsigned int last;
 
+		if (gd->flags & GD_FLG_POSTSTOP)
+			return 0;
+
 		if (post_bootmode_get (&last) & POST_POWERTEST) {
 			if (last & POST_FAIL_SAVE) {
 				last &= ~POST_FAIL_SAVE;
@@ -285,6 +294,8 @@ int post_run (char *name, int flags)
 						 flags | POST_REBOOT, last);
 
 				for (i = last + 1; i < post_list_size; i++) {
+					if (gd->flags & GD_FLG_POSTSTOP)
+						break;
 					post_run_single (post_list + i,
 							 test_flags[i],
 							 flags, i);
@@ -292,6 +303,8 @@ int post_run (char *name, int flags)
 			}
 		} else {
 			for (i = 0; i < post_list_size; i++) {
+				if (gd->flags & GD_FLG_POSTSTOP)
+					break;
 				post_run_single (post_list + i,
 						 test_flags[i],
 						 flags, i);
diff --git a/post/rules.mk b/post/rules.mk
index 94e72be..1efc9c7 100644
--- a/post/rules.mk
+++ b/post/rules.mk
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 COBJS	:= $(COBJS-y)
 AOBJS	:= $(AOBJS-y)
-SRCS 	:= $(AOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(AOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(AOBJS) $(COBJS))
 LIB	:= $(obj)$(LIB)
 
diff --git a/post/tests.c b/post/tests.c
index 36473e3..a790c78 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -29,6 +29,7 @@
 
 #include <post.h>
 
+extern int ocm_post_test (int flags);
 extern int cache_post_test (int flags);
 extern int watchdog_post_test (int flags);
 extern int i2c_post_test (int flags);
@@ -60,6 +61,18 @@ extern void sysmon_reloc (void);
 
 struct post_test post_list[] =
 {
+#if CONFIG_POST & CFG_POST_OCM
+    {
+	"OCM test",
+	"ocm",
+	"This test checks on chip memory (OCM).",
+	POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
+	&ocm_post_test,
+	NULL,
+	NULL,
+	CFG_POST_OCM
+    },
+#endif
 #if CONFIG_POST & CFG_POST_CACHE
     {
 	"Cache test",
@@ -270,7 +283,7 @@ struct post_test post_list[] =
 #if CONFIG_POST & CFG_POST_BSPEC4
 	CONFIG_POST_BSPEC4,
 #endif
-#if CONFIG_POST & CFG_POST_BSPEC4
+#if CONFIG_POST & CFG_POST_BSPEC5
 	CONFIG_POST_BSPEC5,
 #endif
 };