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author | Markus Klotzbuecher <mk@denx.de> | 2008-07-10 10:26:07 +0200 |
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committer | Markus Klotzbuecher <mk@denx.de> | 2008-07-10 10:26:07 +0200 |
commit | 794a5924972fc8073616e98a2668da4a5f9aea90 (patch) | |
tree | dd0db39b3e183b5bcb0300d5377d7a0d5ac5fd0c /post | |
parent | f2aeecc320f5b181b30effcaa67683aec8d5a843 (diff) | |
parent | 4188f0491886b3b486164e819c0a83fdb97efd7d (diff) | |
download | u-boot-imx-794a5924972fc8073616e98a2668da4a5f9aea90.zip u-boot-imx-794a5924972fc8073616e98a2668da4a5f9aea90.tar.gz u-boot-imx-794a5924972fc8073616e98a2668da4a5f9aea90.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot
Diffstat (limited to 'post')
-rw-r--r-- | post/board/lwmon5/fpga.c | 50 | ||||
-rw-r--r-- | post/cpu/ppc4xx/uart.c | 10 | ||||
-rw-r--r-- | post/post.c | 1 | ||||
-rw-r--r-- | post/tests.c | 2 |
4 files changed, 57 insertions, 6 deletions
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c index b48390b..ef641d7 100644 --- a/post/board/lwmon5/fpga.c +++ b/post/board/lwmon5/fpga.c @@ -41,6 +41,15 @@ DECLARE_GLOBAL_DATA_PTR; #if CONFIG_POST & CFG_POST_BSPEC3 +/* Testpattern for fpga memorytest */ +static uint pattern[] = { + 0x55555555, + 0xAAAAAAAA, + 0xAA5555AA, + 0x55AAAA55, + 0x0 +}; + static int one_scratch_test(uint value) { uint read_value; @@ -60,9 +69,42 @@ static int one_scratch_test(uint value) return ret; } +/* FPGA Memory-pattern-test */ +static int fpga_mem_test(void * address) +{ + int ret = 1; + uint read_value; + uint old_value; + uint i = 0; + /* save content */ + old_value = in_be32(address); + + while (pattern[i] != 0) { + out_be32(address, pattern[i]); + /* read other location (protect against data lines capacity) */ + ret = in_be16((void *)FPGA_VERSION_REG); + /* verify test pattern */ + read_value = in_be32(address); + + if (read_value != pattern[i]) { + post_log("FPGA Memory test failed."); + post_log(" write %08X, read %08X at address %08X\n", + pattern[i], read_value, address); + ret = 1; + goto out; + } + i++; + } + + ret = 0; +out: + out_be32(address, old_value); + return ret; +} /* Verify FPGA, get version & memory size */ int fpga_post_test(int flags) { + uint address; uint old_value; ushort version; uint read_value; @@ -88,6 +130,14 @@ int fpga_post_test(int flags) read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000); post_log("FPGA RAM size: %d bytes\n", read_value); + for (address = 0; address < 0x1000; address++) { + if (fpga_mem_test((void *)(FPGA_RAM_START + 4*address)) == 1) { + ret = 1; + goto out; + } + } + +out: return ret; } diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index 27cfb91..1a57c3d 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -79,13 +79,13 @@ #define UDIV_SUBTRACT 0 #define UART0_SDR sdr_uart0 #define UART1_SDR sdr_uart1 -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPe) +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) #define UART2_SDR sdr_uart2 #endif -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) #define UART3_SDR sdr_uart3 #endif #define MFREG(a, d) mfsdr(a, d) diff --git a/post/post.c b/post/post.c index d31829b..99dc8c9 100644 --- a/post/post.c +++ b/post/post.c @@ -319,6 +319,7 @@ int post_run (char *name, int flags) } if (i < post_list_size) { + WATCHDOG_RESET(); return post_run_single (post_list + i, test_flags[i], flags, i); diff --git a/post/tests.c b/post/tests.c index a790c78..e88d92e 100644 --- a/post/tests.c +++ b/post/tests.c @@ -240,7 +240,7 @@ struct post_test post_list[] = "DSP test", "dsp", "This test checks any connected DSP(s).", - POST_RAM | POST_MANUAL, + POST_RAM | POST_ALWAYS | POST_MANUAL, &dsp_post_test, NULL, NULL, |