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author | Nishanth Menon <nm@ti.com> | 2010-11-19 11:18:12 -0500 |
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committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-11-19 16:27:37 -0500 |
commit | eb9a28f699667919bf140bdabdf37c25be725c79 (patch) | |
tree | 2ba25ba5964c433e270c78acfd5ccdb8862a05c3 /post/post.c | |
parent | f35d61ac3d1fd324a171904f3fa114e3b10e24ef (diff) | |
download | u-boot-imx-eb9a28f699667919bf140bdabdf37c25be725c79.zip u-boot-imx-eb9a28f699667919bf140bdabdf37c25be725c79.tar.gz u-boot-imx-eb9a28f699667919bf140bdabdf37c25be725c79.tar.bz2 |
mmc: omap: timeout counter fix
Having a loop with a counter is no timing guarentee for timing
accuracy or compiler optimizations. For e.g. the same loop counter
which runs when the MPU is running at 600MHz will timeout in around
half the time when running at 1GHz. or the example where GCC 4.5
compiles with different optimization compared to GCC 4.4. use timer
to keep track of time elapse and we use an emperical number - 1sec
for a worst case timeout. This should never happen, and is adequate
imaginary condition for us to fail with timeout.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'post/post.c')
0 files changed, 0 insertions, 0 deletions