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authorAngela Stegmaier <angelabaker@ti.com>2015-02-16 10:15:55 +0530
committerTom Rini <trini@ti.com>2015-02-16 12:41:40 -0500
commitaa8ac43645243b69faf0e81fab5f0d6fcf4285cf (patch)
tree4375c1e8dc55b61a777dcbbdbb7e9939821e076f /post/lib_powerpc/rlwnm.c
parent89831112d46fb19127f3de9cec781e5a9c28b281 (diff)
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ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock
DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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