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| author | Andy Fleming <afleming@freescale.com> | 2013-03-25 07:33:14 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-14 16:00:25 -0500 |
| commit | 3e4c3137d6aefaf45a87bbad701fc336f3f24a3d (patch) | |
| tree | c54a1d50c43176f8ff2ae429e4c8777780655459 /post/lib_powerpc/asm.S | |
| parent | 7ff8c7ce35c4468aac02f1ab4468e23384564eb0 (diff) | |
| download | u-boot-imx-3e4c3137d6aefaf45a87bbad701fc336f3f24a3d.zip u-boot-imx-3e4c3137d6aefaf45a87bbad701fc336f3f24a3d.tar.gz u-boot-imx-3e4c3137d6aefaf45a87bbad701fc336f3f24a3d.tar.bz2 | |
e6500: Move L1 enablement after L2 enablement
The L1 D-cache on e6500 is write-through. This means that it's not
considered a good idea to have the L1 up and running if the L2 is
disabled. We don't actually *use* the L1 until after the L2 is
brought up on e6500, so go ahead and move the L1 enablement after
that code is done.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'post/lib_powerpc/asm.S')
0 files changed, 0 insertions, 0 deletions