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authorAngela Stegmaier <angelabaker@ti.com>2015-02-16 10:15:55 +0530
committerTom Rini <trini@ti.com>2015-02-16 12:41:40 -0500
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ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock
DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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