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author | Peter Pearse <peter.pearse@arm.com> | 2007-04-19 13:17:20 +0100 |
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committer | Peter Pearse <peter.pearse@arm.com> | 2007-04-19 13:17:20 +0100 |
commit | ee89bf2782406b1f87088b4764aeb6f811d82526 (patch) | |
tree | b144476f4b5e92a414efff165d214d34062d4365 /post/drivers/cache.c | |
parent | 9c00dfb0bf89c8c23e8af5b5bdf49cf66d769f85 (diff) | |
parent | 37837828d89084879bee2f2b8c7c68d4695940df (diff) | |
download | u-boot-imx-ee89bf2782406b1f87088b4764aeb6f811d82526.zip u-boot-imx-ee89bf2782406b1f87088b4764aeb6f811d82526.tar.gz u-boot-imx-ee89bf2782406b1f87088b4764aeb6f811d82526.tar.bz2 |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'post/drivers/cache.c')
-rw-r--r-- | post/drivers/cache.c | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/post/drivers/cache.c b/post/drivers/cache.c new file mode 100644 index 0000000..501465c --- /dev/null +++ b/post/drivers/cache.c @@ -0,0 +1,81 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +/* Cache test + * + * This test verifies the CPU data and instruction cache using + * several test scenarios. + */ + +#ifdef CONFIG_POST + +#include <post.h> +#include <watchdog.h> + +#if CONFIG_POST & CFG_POST_CACHE + +#define CACHE_POST_SIZE 1024 + +extern int cache_post_test1 (char *, unsigned int); +extern int cache_post_test2 (char *, unsigned int); +extern int cache_post_test3 (char *, unsigned int); +extern int cache_post_test4 (char *, unsigned int); +extern int cache_post_test5 (void); +extern int cache_post_test6 (void); + +int cache_post_test (int flags) +{ + int ints = disable_interrupts (); + int res = 0; + static char ta[CACHE_POST_SIZE + 0xf]; + char *testarea = (char *) (((unsigned long) ta + 0xf) & ~0xf); + + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test1 (testarea, CACHE_POST_SIZE); + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test2 (testarea, CACHE_POST_SIZE); + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test3 (testarea, CACHE_POST_SIZE); + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test4 (testarea, CACHE_POST_SIZE); + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test5 (); + WATCHDOG_RESET (); + if (res == 0) + res = cache_post_test6 (); + + WATCHDOG_RESET (); + if (ints) + enable_interrupts (); + return res; +} + +#endif /* CONFIG_POST & CFG_POST_CACHE */ +#endif /* CONFIG_POST */ |