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author | Stefan Roese <sr@denx.de> | 2007-10-31 20:45:53 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:47 +0100 |
commit | a2685904061b35a17583d65fe47cdc2686a69eaa (patch) | |
tree | 62e1839e98a3680382c66d6ed2a6dc59a02e1b04 /post/cpu/ppc4xx | |
parent | ff768cb168d8157c24a25016dbfbeb465e47f420 (diff) | |
download | u-boot-imx-a2685904061b35a17583d65fe47cdc2686a69eaa.zip u-boot-imx-a2685904061b35a17583d65fe47cdc2686a69eaa.tar.gz u-boot-imx-a2685904061b35a17583d65fe47cdc2686a69eaa.tar.bz2 |
ppc4xx: Remove temporary TLB entry in POST cache test only for 440
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'post/cpu/ppc4xx')
-rw-r--r-- | post/cpu/ppc4xx/cache.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/post/cpu/ppc4xx/cache.c b/post/cpu/ppc4xx/cache.c index 38e6e98..30d5088 100644 --- a/post/cpu/ppc4xx/cache.c +++ b/post/cpu/ppc4xx/cache.c @@ -119,7 +119,9 @@ int cache_post_test (int flags) if (ints) enable_interrupts (); +#ifdef CONFIG_440 remove_tlb((u32)virt, CACHE_POST_SIZE); +#endif return res; } |