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author | Igor Lisitsin <igor@emcraft.com> | 2007-03-28 19:06:19 +0400 |
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committer | Wolfgang Denk <wd@denx.de> | 2007-06-22 23:21:01 +0200 |
commit | a11e06965ec91270c51853407ff1261d3c740386 (patch) | |
tree | 438b2a6816ee30034a1c5d979370185570bbdba8 /post/cpu/ppc4xx/fpu.c | |
parent | 02032e8f14751a1a751b09240a4f1cf9f8a2077f (diff) | |
download | u-boot-imx-a11e06965ec91270c51853407ff1261d3c740386.zip u-boot-imx-a11e06965ec91270c51853407ff1261d3c740386.tar.gz u-boot-imx-a11e06965ec91270c51853407ff1261d3c740386.tar.bz2 |
Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
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Diffstat (limited to 'post/cpu/ppc4xx/fpu.c')
-rw-r--r-- | post/cpu/ppc4xx/fpu.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/post/cpu/ppc4xx/fpu.c b/post/cpu/ppc4xx/fpu.c new file mode 100644 index 0000000..1935c01 --- /dev/null +++ b/post/cpu/ppc4xx/fpu.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2007 Wolfgang Denk <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +#ifdef CONFIG_POST +#if defined(CONFIG_440EP) || \ + defined(CONFIG_440EPX) + +#include <ppc4xx.h> +#include <asm/processor.h> + + +int fpu_status(void) +{ + if (mfspr(ccr0) & CCR0_DAPUIB) + return 0; /* Disabled */ + else + return 1; /* Enabled */ +} + + +void fpu_disable(void) +{ + mtspr(ccr0, mfspr(ccr0) | CCR0_DAPUIB); + mtmsr(mfmsr() & ~MSR_FP); +} + + +void fpu_enable(void) +{ + mtspr(ccr0, mfspr(ccr0) & ~CCR0_DAPUIB); + mtmsr(mfmsr() | MSR_FP); +} +#endif +#endif |