ppc4xx: Big lwmon5 board support rework/update

This patch brings the lwmon5 board support up-to-date. Here a
summary of the changes:

lwmon5 board port related:
- GPIO's changed to control the LSB transmitter
- Reset USB PHY's upon power-up
- Enable CAN upon power-up
- USB init error workaround (errata CHIP_6)
- EBC: Enable burstmode and modify the timings for the GDC memory
- EBC: Speed up NOR flash timings

lwmon5 board POST related:
- Add FPGA memory test
- Add GDC memory test
- DSP POST reworked
- SYSMON POST: Fix handling of negative temperatures
- Add output for sysmon1 POST
- HW-watchdog min. time test reworked

Additionally some coding-style changes were done.

Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Stefan Roese <sr@denx.de>

1 files changed, 19 insertions, 2 deletions

diff --git a/post/board/lwmon5/dsp.c b/post/board/lwmon5/dsp.c
index 0e6d908..913cd97 100644
--- a/post/board/lwmon5/dsp.c
+++ b/post/board/lwmon5/dsp.c
@@ -33,20 +33,37 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define DSP_STATUS_REG 0xC4000008
+#define DSP_STATUS_REG		0xC4000008
+#define FPGA_STATUS_REG		0xC400000C
 
 int dsp_post_test(int flags)
 {
+	uint   old_value;
 	uint   read_value;
 	int    ret;
 
+	/* momorize fpga status */
+	old_value = in_be32((void *)FPGA_STATUS_REG);
+	/* enable outputs */
+	out_be32((void *)FPGA_STATUS_REG, 0x30);
+
+	/* generate sync signal */
+	out_be32((void *)DSP_STATUS_REG, 0x300);
+	udelay(5);
+	out_be32((void *)DSP_STATUS_REG, 0);
+	udelay(500);
+
+	/* read status */
 	ret = 0;
 	read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
-	if (read_value != 0x3) {
+	if (read_value != 0x03) {
 		post_log("\nDSP status read %08X\n", read_value);
 		ret = 1;
 	}
 
+	/* restore fpga status */
+	out_be32((void *)FPGA_STATUS_REG, old_value);
+
 	return ret;
 }