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| author | Anton staaf <robotboy@chromium.org> | 2011-11-10 11:56:50 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2011-11-12 15:39:29 -0600 |
| commit | 5a762e2509a2d4b2e86168a2ffbc425087ecd75c (patch) | |
| tree | ab7b84c2789f53550d7051c654f961513d67256b /onenand_ipl | |
| parent | 8e42f0d62b9ee5ff5d3b2ddda16d98d5c792719c (diff) | |
| download | u-boot-imx-5a762e2509a2d4b2e86168a2ffbc425087ecd75c.zip u-boot-imx-5a762e2509a2d4b2e86168a2ffbc425087ecd75c.tar.gz u-boot-imx-5a762e2509a2d4b2e86168a2ffbc425087ecd75c.tar.bz2 | |
Tegra2: mmc: Support DMA restarts at buffer boundaries
Currently if a DMA buffer straddles a buffer alignment boundary
(512KiB) then the DMA engine will pause and generate a DMA
interrupt. Since the DMA interrupt is not enabled it will hang
the MMC driver.
This patch adds support for restarting the DMA transfer. The
SYSTEM_ADDRESS register contains the next address that would have
been read/written when a boundary is hit. So we can read that
and write it back. The write triggers the resumption of the
transfer.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'onenand_ipl')
0 files changed, 0 insertions, 0 deletions