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| author | Ira Snyder <iws@ovro.caltech.edu> | 2011-12-23 08:30:40 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-01-08 21:28:28 -0600 |
| commit | 8eee2bd7f484c4933c4e3112c3c3db886ac945ca (patch) | |
| tree | af4e09bdd1926cc3b42dd7b8afc38b9f2cb65554 /onenand_ipl | |
| parent | bf83662ba3a8586e52d3cfee1d82d5e06b61eefc (diff) | |
| download | u-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.zip u-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.tar.gz u-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.tar.bz2 | |
fsl_esdhc: fix PIO mode transfers
The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.
Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.
Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Diffstat (limited to 'onenand_ipl')
0 files changed, 0 insertions, 0 deletions