ARM: Remove apollon board

This board is the only board that still sticks to OneNAND IPL.
Remove this board, since we have SPL around for a while and
OneNAND is well supported in the SPL framework. The board can
be revived if necessary.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tom Rini <trini@ti.com>

5 files changed, 0 insertions, 429 deletions

diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile
deleted file mode 100644
index 3bc9920..0000000
--- a/onenand_ipl/board/apollon/Makefile
+++ /dev/null
@@ -1,87 +0,0 @@
-
-include $(TOPDIR)/config.mk
-include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk
-
-LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
-LDFLAGS	= -Bstatic -T $(onenandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
-AFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_ONENAND_IPL
-CFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_ONENAND_IPL
-OBJCFLAGS += --gap-fill=0x00
-
-SOBJS	:= low_levelinit.o
-SOBJS	+= start.o
-COBJS	:= apollon.o
-COBJS	+= onenand_read.o
-COBJS	+= onenand_boot.o
-
-SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(OBJTREE)/onenand_ipl/board/$(BOARDDIR)
-
-onenandobj	:= $(OBJTREE)/onenand_ipl/
-
-ALL	= $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin $(onenandobj)onenand-ipl-2k.bin $(onenandobj)onenand-ipl-4k.bin
-
-all:	$(obj).depend $(ALL)
-
-$(onenandobj)onenand-ipl-2k.bin:	$(onenandobj)onenand-ipl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=0x800 -O binary $< $@
-
-$(onenandobj)onenand-ipl-4k.bin:	$(onenandobj)onenand-ipl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=0x1000 -O binary $< $@
-
-$(onenandobj)onenand-ipl.bin:	$(onenandobj)onenand-ipl
-	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-$(onenandobj)onenand-ipl:	$(OBJS) $(onenandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
-		-Map $@.map -o $@
-
-$(onenandobj)u-boot.lds:	$(LDSCRIPT)
-	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links from common files
-
-# from cpu directory
-$(obj)start.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/$(CPUDIR)/start.S $@
-
-# from onenand_ipl directory
-$(obj)onenand_ipl.h:
-	@rm -f $@
-	ln -s $(SRCTREE)/onenand_ipl/onenand_ipl.h $@
-
-$(obj)onenand_boot.c:	$(obj)onenand_ipl.h
-	@rm -f $@
-	ln -s $(SRCTREE)/onenand_ipl/onenand_boot.c $@
-
-$(obj)onenand_read.c:	$(obj)onenand_ipl.h
-	@rm -f $@
-	ln -s $(SRCTREE)/onenand_ipl/onenand_read.c $@
-
-ifneq ($(OBJTREE), $(SRCTREE))
-$(obj)apollon.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/onenand_ipl/board/$(BOARDDIR)/apollon.c $@
-
-$(obj)low_levelinit.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/onenand_ipl/board/$(BOARDDIR)/low_levelinit.S $@
-endif
-
-#########################################################################
-
-$(obj)%.o:	$(obj)%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(obj)$.c
-	$(CC) $(CFLAGS) -c -o $@ $<
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/onenand_ipl/board/apollon/apollon.c b/onenand_ipl/board/apollon/apollon.c
deleted file mode 100644
index 4936e00..0000000
--- a/onenand_ipl/board/apollon/apollon.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2005-2008 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <asm/arch/mux.h>
-
-#define write_config_reg(reg, value)                                    \
-do {                                                                    \
-	writeb(value, reg);                                             \
-} while (0)
-
-/*****************************************
- * Routine: board_init
- * Description: Early hardware init.
- *****************************************/
-int board_init(void)
-{
-	return 0;
-}
-
-#ifdef CONFIG_SYS_PRINTF
-/* Pin Muxing registers used for UART1 */
-/****************************************
- * Routine: muxSetupUART1  (ostboot)
- * Description: Set up uart1 muxing
- *****************************************/
-static void muxSetupUART1(void)
-{
-	/* UART1_CTS pin configuration, PIN = D21 */
-	write_config_reg(CONTROL_PADCONF_UART1_CTS, 0);
-	/* UART1_RTS pin configuration, PIN = H21 */
-	write_config_reg(CONTROL_PADCONF_UART1_RTS, 0);
-	/* UART1_TX pin configuration, PIN = L20 */
-	write_config_reg(CONTROL_PADCONF_UART1_TX, 0);
-	/* UART1_RX pin configuration, PIN = T21 */
-	write_config_reg(CONTROL_PADCONF_UART1_RX, 0);
-}
-#endif
-
-/**********************************************************
- * Routine: s_init
- * Description: Does early system init of muxing and clocks.
- * - Called at time when only stack is available.
- **********************************************************/
-int s_init(int skip)
-{
-#ifdef CONFIG_SYS_PRINTF
-	muxSetupUART1();
-#endif
-	return 0;
-}
diff --git a/onenand_ipl/board/apollon/config.mk b/onenand_ipl/board/apollon/config.mk
deleted file mode 100644
index 62956e8..0000000
--- a/onenand_ipl/board/apollon/config.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2005-2008 Samsung Electronics
-# Kyungmin Park <kyungmin.park@samsung.com>
-#
-# Samsung Apollon board with OMAP2420 (ARM1136) cpu
-#
-# Apollon has 1 bank of 128MB mDDR-SDRAM on CS0
-# Physical Address:
-# 8000'0000 (bank0)
-# 8800'0000 (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-CONFIG_SYS_TEXT_BASE = 0x00000000
diff --git a/onenand_ipl/board/apollon/low_levelinit.S b/onenand_ipl/board/apollon/low_levelinit.S
deleted file mode 100644
index cab4227..0000000
--- a/onenand_ipl/board/apollon/low_levelinit.S
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2005-2008 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * Derived from board/omap2420h4/platform.S
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/arch/omap2420.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/clocks.h>
-
-#define APOLLON_CS0_BASE	0x00000000
-
-#ifdef PRCM_CONFIG_I
-#define SDRC_ACTIM_CTRLA_0_VAL	0x7BA35907
-#define SDRC_ACTIM_CTRLB_0_VAL	0x00000013
-#define SDRC_RFR_CTRL_0_VAL	0x00044C01
-
-/* GPMC */
-#define APOLLON_GPMC_CONFIG1_0	0xe30d1201
-#define APOLLON_GPMC_CONFIG2_0	0x000c1000
-#define APOLLON_GPMC_CONFIG3_0	0x00030400
-#define APOLLON_GPMC_CONFIG4_0	0x0B841006
-#define APOLLON_GPMC_CONFIG5_0	0x020F0C11
-#define APOLLON_GPMC_CONFIG6_0	0x00000000
-#define APOLLON_GPMC_CONFIG7_0	(0x00000e40 | (APOLLON_CS0_BASE >> 24))
-
-#elif defined(PRCM_CONFIG_II)
-#define SDRC_ACTIM_CTRLA_0_VAL	0x4A59B485
-#define SDRC_ACTIM_CTRLB_0_VAL	0x0000000C
-#define SDRC_RFR_CTRL_0_VAL	0x00030001
-
-/* GPMC */
-#define APOLLON_GPMC_CONFIG1_0	0xe30d1201
-#define APOLLON_GPMC_CONFIG2_0	0x00080E81
-#define APOLLON_GPMC_CONFIG3_0	0x00030400
-#define APOLLON_GPMC_CONFIG4_0	0x08041586
-#define APOLLON_GPMC_CONFIG5_0	0x020C090E
-#define APOLLON_GPMC_CONFIG6_0	0x00000000
-#define APOLLON_GPMC_CONFIG7_0	(0x00000e40 | (APOLLON_CS0_BASE >> 24))
-
-#else
-#error "Please configure PRCM schecm"
-#endif
-
-_TEXT_BASE:
-	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
-
-.globl lowlevel_init
-lowlevel_init:
-	mov r3, r0     /* save skip information */
-
-	/* Disable watchdog */
-	ldr	r0, =WD2_BASE
-	ldr	r1, =WD_UNLOCK1
-	str	r1, [r0, #WSPR]
-
-	ldr	r1, =WD_UNLOCK2
-	str	r1, [r0, #WSPR]
-
-#ifdef DEBUG_LED
-	/* LED0 OFF */
-	ldr	r0, =0x480000E5		/* ball AA10, mode 3 */
-	mov	r1, #0x0b
-	strb	r1, [r0]
-#endif
-
-	/* Pin muxing for SDRC */
-	mov	r1, #0x00
-	ldr	r0, =0x480000A1		/* ball C12, mode 0 */
-	strb	r1, [r0]
-
-	ldr	r0, =0x48000032		/* ball D11, mode 0 */
-	strb	r1, [r0]
-
-	ldr	r0, =0x480000A3		/* ball B13, mode 0 */
-	strb	r1, [r0]
-
-	/* SDRC setting */
-	ldr	r0, =OMAP2420_SDRC_BASE
-	ldr	r1, =0x00000010
-	str	r1, [r0, #0x10]
-
-	ldr	r1, =0x00000100
-	str	r1, [r0, #0x44]
-
-	/* SDRC CS0 configuration */
-#ifdef CONFIG_APOLLON_PLUS
-	ldr	r1, =0x01702011
-#else
-	ldr	r1, =0x00d04011
-#endif
-	str	r1, [r0, #0x80]
-
-	ldr	r1, =SDRC_ACTIM_CTRLA_0_VAL
-	str	r1, [r0, #0x9C]
-
-	ldr	r1, =SDRC_ACTIM_CTRLB_0_VAL
-	str	r1, [r0, #0xA0]
-
-	ldr	r1, =SDRC_RFR_CTRL_0_VAL
-	str	r1, [r0, #0xA4]
-
-	ldr	r1, =0x00000041
-	str	r1, [r0, #0x70]
-
-	/* Manual command sequence */
-	ldr	r1, =0x00000007
-	str	r1, [r0, #0xA8]
-
-	ldr	r1, =0x00000000
-	str	r1, [r0, #0xA8]
-
-	ldr	r1, =0x00000001
-	str	r1, [r0, #0xA8]
-
-	ldr	r1, =0x00000002
-	str	r1, [r0, #0xA8]
-	str	r1, [r0, #0xA8]
-
-	/*
-	 * CS0 SDRC Mode register
-	 *   Burst length = 4 - DDR memory
-	 *   Serial mode
-	 *   CAS latency = 3
-	 */
-	ldr	r1, =0x00000032
-	str	r1, [r0, #0x84]
-
-	/* Note: You MUST set EMR values */
-	/* EMR1 & EMR2 */
-	ldr	r1, =0x00000000
-	str	r1, [r0, #0x88]
-	str	r1, [r0, #0x8C]
-
-#ifdef OLD_SDRC_DLLA_CTRL
-	/* SDRC_DLLA_CTRL */
-	ldr	r1, =0x00007306
-	str	r1, [r0, #0x60]
-
-	ldr	r1, =0x00007303
-	str	r1, [r0, #0x60]
-#else
-	/* SDRC_DLLA_CTRL */
-	ldr	r1, =0x00000506
-	str	r1, [r0, #0x60]
-
-	ldr	r1, =0x00000503
-	str	r1, [r0, #0x60]
-#endif
-
-#ifdef __BROKEN_FEATURE__
-	/* SDRC_DLLB_CTRL */
-	ldr	r1, =0x00000506
-	str	r1, [r0, #0x68]
-
-	ldr	r1, =0x00000503
-	str	r1, [r0, #0x68]
-#endif
-
-	/* little delay after init */
-	mov	r2, #0x1800
-1:
-	subs	r2, r2, #0x1
-	bne	1b
-
-	ldr	sp, SRAM_STACK
-	str	ip, [sp]	/* stash old link register */
-	mov	ip, lr		/* save link reg across call */
-	mov	r0, r3		/* pass skip info to s_init */
-
-	bl	s_init		/* go setup pll,mux,memory */
-
-	ldr	ip, [sp]	/* restore save ip */
-	mov	lr, ip		/* restore link reg */
-
-	/* back to arch calling code */
-	mov	pc,	lr
-
-	/* the literal pools origin */
-	.ltorg
-
-SRAM_STACK:
-	.word LOW_LEVEL_SRAM_STACK
diff --git a/onenand_ipl/board/apollon/u-boot.onenand.lds b/onenand_ipl/board/apollon/u-boot.onenand.lds
deleted file mode 100644
index 721d2f5..0000000
--- a/onenand_ipl/board/apollon/u-boot.onenand.lds
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * (C) Copyright 2005-2008 Samsung Electronics
- * Kyungmin Park <kyungmin.park@samsung.com>
- *
- * Derived from X-loader
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text      :
-	{
-	  start.o	(.text)
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.bss : { *(.bss) . = ALIGN(4); }
-	__bss_end__ = .;
-}