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| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:33:27 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-14 16:00:29 -0500 |
| commit | 615f0cba584d11944b43af03cc6d9324fc7587e3 (patch) | |
| tree | e2f0639298f97b9fbc2f132de878d7f28389cd83 /net | |
| parent | eb80880eb2806eea4436e9ee7fd8a8b741ee0620 (diff) | |
| download | u-boot-imx-615f0cba584d11944b43af03cc6d9324fc7587e3.zip u-boot-imx-615f0cba584d11944b43af03cc6d9324fc7587e3.tar.gz u-boot-imx-615f0cba584d11944b43af03cc6d9324fc7587e3.tar.bz2 | |
powerpc/mpc85xx: Fix PIR parsing for chassis2
The PIR parsing algorithm we used is not only for E6500. It applies to all
SoCs with chassis 2.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions