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authorAdrian Alonso <adrian.alonso@nxp.com>2016-10-31 13:57:54 -0500
committerAdrian Alonso <adrian.alonso@nxp.com>2016-10-31 14:18:30 -0500
commit03cc626df73d6c2bb36daf280b1cd43170c298a0 (patch)
tree67584291462769ed9275ea4b691307889a0e1c11 /net/eth-uclass.c
parent8d2e9cb7996cde1cee979d56b38c41ec84629416 (diff)
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MLK-13407: mx6qarm2: mt128x64mx3 2: add init pre charge all command
- Adjust ZQ delay for MMDC clock frequency at 400MHz - Precharge all commands per JEDEC The memory controller may optionally issue a Precharge-All command prior to the MRW Reset command, this is strongly recommended to ensure a robust DRAM initialization DDR Calibration script: http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/a72e010a1fd8c7fe0fda7bdc4d058c478e94c3da Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
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