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authorFabio Estevam <fabio.estevam@freescale.com>2013-04-09 13:06:25 +0000
committerStefano Babic <sbabic@denx.de>2013-04-13 17:46:42 +0200
commit0f1411bc8dade4472ca802f46f75714e67301bb0 (patch)
tree38bb65f86352d2da7a20452e92076908b96f9faf /net/bootp.c
parent66300ac25b70018c81c931c981317f6ba390182d (diff)
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spi: mxc_spi: Set master mode for all channels
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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