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| author | Alex Waterman <awaterman@dawning.com> | 2011-05-19 15:08:36 -0400 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2011-07-01 15:56:52 -0500 |
| commit | eced4626e4d8ea2fd2662045dc7aad0f07db7a41 (patch) | |
| tree | b69ea937b15426b9a4c19521ee5f8420531cee84 /nand_spl | |
| parent | c9494866df835bcee68e17339aec1090faa704da (diff) | |
| download | u-boot-imx-eced4626e4d8ea2fd2662045dc7aad0f07db7a41.zip u-boot-imx-eced4626e4d8ea2fd2662045dc7aad0f07db7a41.tar.gz u-boot-imx-eced4626e4d8ea2fd2662045dc7aad0f07db7a41.tar.bz2 | |
NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:
CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a
16 bit device is attached.
CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus
Controller configuration register.
Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.
The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.
Signed-off-by: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'nand_spl')
| -rw-r--r-- | nand_spl/nand_boot.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 9545a9a..4683c7c 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -122,10 +122,15 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block) nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); /* - * Read one byte + * Read one byte (or two if it's a 16 bit chip). */ - if (readb(this->IO_ADDR_R) != 0xff) - return 1; + if (this->options & NAND_BUSWIDTH_16) { + if (readw(this->IO_ADDR_R) != 0xffff) + return 1; + } else { + if (readb(this->IO_ADDR_R) != 0xff) + return 1; + } return 0; } |