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| author | Wolfgang Denk <wd@denx.de> | 2008-04-22 17:21:24 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-04-22 17:21:24 +0200 |
| commit | 58c5376ba67767ee684069d43e7f747a5d9ae8ed (patch) | |
| tree | dfd19b2fb608c8ba238da53f3302c30d94a1e0ba /nand_spl | |
| parent | dc7746d86d2a3dfe01ab9a70cb427f92adc303c7 (diff) | |
| parent | 5d40d4430d9ebc8434c6f0798594836e1efa7a1e (diff) | |
| download | u-boot-imx-58c5376ba67767ee684069d43e7f747a5d9ae8ed.zip u-boot-imx-58c5376ba67767ee684069d43e7f747a5d9ae8ed.tar.gz u-boot-imx-58c5376ba67767ee684069d43e7f747a5d9ae8ed.tar.bz2 | |
Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'nand_spl')
| -rw-r--r-- | nand_spl/board/amcc/canyonlands/config.mk | 6 | ||||
| -rw-r--r-- | nand_spl/board/amcc/canyonlands/ddr2_fixed.c | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/nand_spl/board/amcc/canyonlands/config.mk b/nand_spl/board/amcc/canyonlands/config.mk index 6dad876..c8d7c23 100644 --- a/nand_spl/board/amcc/canyonlands/config.mk +++ b/nand_spl/board/amcc/canyonlands/config.mk @@ -34,9 +34,9 @@ # TEXT_BASE = 0xE3003000 -# PAD_TO used to generate a 16kByte binary needed for the combined image -# -> PAD_TO = TEXT_BASE + 0x4000 -PAD_TO = 0xE3007000 +# PAD_TO used to generate a 128kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 0x20000 +PAD_TO = 0xE3023000 PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c index 48708a8..79f3b0f 100644 --- a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c +++ b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c @@ -49,11 +49,11 @@ long int initdram(int board_type) * enabled. This will only work for the same memory * configuration as used here: * - * Crucial CT3264AC53E.4FD - 256MB SO-DIMM + * Crucial CT6464AC53E.4FE - 512MB SO-DIMM * */ mtsdram(SDRAM_MCOPT2, 0x00000000); - mtsdram(SDRAM_MCOPT1, 0x05122000); + mtsdram(SDRAM_MCOPT1, 0x05322000); mtsdram(SDRAM_MODT0, 0x01000000); mtsdram(SDRAM_CODT, 0x00800021); mtsdram(SDRAM_WRDTR, 0x82000823); @@ -62,7 +62,7 @@ long int initdram(int board_type) mtsdram(SDRAM_RTR, 0x06180000); mtsdram(SDRAM_SDTR1, 0x80201000); mtsdram(SDRAM_SDTR2, 0x42103243); - mtsdram(SDRAM_SDTR3, 0x0A0D0D16); + mtsdram(SDRAM_SDTR3, 0x0A0D0D1A); mtsdram(SDRAM_MMODE, 0x00000632); mtsdram(SDRAM_MEMODE, 0x00000040); mtsdram(SDRAM_INITPLR0, 0xB5380000); @@ -86,7 +86,7 @@ long int initdram(int board_type) wait_init_complete(); - mtdcr(SDRAM_R0BAS, 0x0000F800); /* MQ0_B0BAS */ + mtdcr(SDRAM_R0BAS, 0x0000F000); /* MQ0_B0BAS */ mtsdram(SDRAM_RDCC, 0x40000000); mtsdram(SDRAM_RQDC, 0x80000038); |