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author | Larry Johnson <lrj@acm.org> | 2008-01-15 14:35:58 -0500 |
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committer | Stefan Roese <sr@denx.de> | 2008-01-16 11:23:33 +0100 |
commit | 4b3cc6ece9c455504cf12909fae38d085d848ac0 (patch) | |
tree | 821cbdba0370de08d9af2bfe6b63f5f58fe4097f /nand_spl | |
parent | 8d99cd0691b7094ea1e2bf5309b0877047a9f375 (diff) | |
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ppc4xx: Refactor ECC POST for AMCC Denali core
The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board. Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.
This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.
Signed-off-by: Larry Johnson <lrj@acm.org>
Diffstat (limited to 'nand_spl')
0 files changed, 0 insertions, 0 deletions