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author | SRICHARAN R <r.sricharan@ti.com> | 2012-03-12 02:25:37 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:23 +0200 |
commit | f40107345cbcd6e0d1747eda45e76c4e2a6df0db (patch) | |
tree | 19926012178f2c73c3fc5c60d391d8d40f1cfaff /nand_spl | |
parent | 6ad8d67de8f9ec9d4a8a90b0b3f78f13bec43c89 (diff) | |
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OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'nand_spl')
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