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| author | Tom Warren <twarren@nvidia.com> | 2013-03-11 16:43:49 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-03-14 11:49:14 -0700 |
| commit | 477393e7875cf4261f107fdfb8887309ea7fc3f7 (patch) | |
| tree | 592cc33128eb526af42ed7196078ba6251226c9e /nand_spl | |
| parent | 5647c0343176d8ea257abf44211c493ef139d3e8 (diff) | |
| download | u-boot-imx-477393e7875cf4261f107fdfb8887309ea7fc3f7.zip u-boot-imx-477393e7875cf4261f107fdfb8887309ea7fc3f7.tar.gz u-boot-imx-477393e7875cf4261f107fdfb8887309ea7fc3f7.tar.bz2 | |
Tegra114: Dalmore: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'nand_spl')
0 files changed, 0 insertions, 0 deletions