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| author | Wolfgang Denk <wd@denx.de> | 2009-07-08 21:51:17 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-08 21:51:17 +0200 |
| commit | 23bca26ab0d09c043bfcada881e423a28cb6b574 (patch) | |
| tree | 265c1f385a0b452518ae555d2aab64173e7d2129 /nand_spl/nand_boot.c | |
| parent | efbf14e9a2394a154b12643d4a011994b5096b5a (diff) | |
| parent | 2e8a6f551cba550e9220dca4d8504066203b1f74 (diff) | |
| download | u-boot-imx-23bca26ab0d09c043bfcada881e423a28cb6b574.zip u-boot-imx-23bca26ab0d09c043bfcada881e423a28cb6b574.tar.gz u-boot-imx-23bca26ab0d09c043bfcada881e423a28cb6b574.tar.bz2 | |
Merge branch 'master' of /home/wd/git/u-boot/custodians
Diffstat (limited to 'nand_spl/nand_boot.c')
| -rw-r--r-- | nand_spl/nand_boot.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index c7eadad..b9fd6f5 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -47,11 +47,13 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 /* Set ALE and clear CLE to start address cycle */ /* Column address */ this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, page_addr & 0xff, 0); /* A[16:9] */ - this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, 0); /* A[24:17] */ + this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ + this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, + NAND_CTRL_ALE); /* A[24:17] */ #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE /* One more address cycle for devices > 32MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[28:25] */ + this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + NAND_CTRL_ALE); /* A[28:25] */ #endif /* Latch in address */ this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); @@ -94,13 +96,15 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 /* Column address */ this->cmd_ctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - this->cmd_ctrl(mtd, (offs >> 8) & 0xff, 0); /* A[11:9] */ + this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - this->cmd_ctrl(mtd, (page_addr & 0xff), 0); /* A[19:12] */ - this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), 0); /* A[27:20] */ + this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), + NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE /* One more address cycle for devices > 128MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[31:28] */ + this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + NAND_CTRL_ALE); /* A[31:28] */ #endif /* Latch in address */ this->cmd_ctrl(mtd, NAND_CMD_READSTART, @@ -246,6 +250,16 @@ void nand_boot(void) ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); +#ifdef CONFIG_NAND_ENV_DST + nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST); + +#ifdef CONFIG_ENV_OFFSET_REDUND + nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); +#endif +#endif + if (nand_chip.select_chip) nand_chip.select_chip(&nand_info, -1); |