ppc4xx: Add Canyonlands NAND booting support

460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.

This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.

Tested with 512 byte page NAND device (32MByte) on Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>

4 files changed, 315 insertions, 0 deletions

diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile
new file mode 100644
index 0000000..1ec1112
--- /dev/null
+++ b/nand_spl/board/amcc/canyonlands/Makefile
@@ -0,0 +1,105 @@
+#
+# (C) Copyright 2008
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_NAND_SPL
+CFLAGS	+= -DCONFIG_NAND_SPL
+
+SOBJS	:= start.o
+SOBJS	+= init.o resetvec.o
+SOBJS	+= resetvec.o
+COBJS	:= ddr2_fixed.o
+COBJS	+= nand_boot.o
+COBJS	+= nand_ecc.o
+COBJS	+= ndfc.o
+
+SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj	:= $(OBJTREE)/nand_spl/
+
+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS)
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+		-Map $(nandobj)u-boot-spl.map \
+		-o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+
+# from cpu directory
+$(obj)ndfc.c:
+	@rm -f $(obj)ndfc.c
+	ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+
+$(obj)resetvec.S:
+	@rm -f $(obj)resetvec.S
+	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+
+$(obj)start.S:
+	@rm -f $(obj)start.S
+	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+
+# from board directory
+$(obj)init.S:
+	@rm -f $(obj)init.S
+	ln -s $(SRCTREE)/board/amcc/canyonlands/init.S $(obj)init.S
+
+# from nand_spl directory
+$(obj)nand_boot.c:
+	@rm -f $(obj)nand_boot.c
+	ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
+
+# from drivers/mtd/nand directory
+$(obj)nand_ecc.c:
+	@rm -f $(obj)nand_ecc.c
+	ln -s $(SRCTREE)/drivers/mtd/nand/nand_ecc.c $(obj)nand_ecc.c
+
+#########################################################################
+
+$(obj)%.o:	$(obj)%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(obj)%.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/amcc/canyonlands/config.mk b/nand_spl/board/amcc/canyonlands/config.mk
new file mode 100644
index 0000000..6dad876
--- /dev/null
+++ b/nand_spl/board/amcc/canyonlands/config.mk
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2008
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# AMCC 460EX Reference Platform (Canyonlands) board
+#
+
+#
+# TEXT_BASE for SPL:
+#
+# On 460EX platforms the SPL is located at 0xfffff000...0xffffffff,
+# in the last 4kBytes of memory space in cache.
+# We will copy this SPL into internal SRAM in start.S. So we set
+# TEXT_BASE to starting address in internal SRAM here.
+#
+TEXT_BASE = 0xE3003000
+
+# PAD_TO used to generate a 16kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 0x4000
+PAD_TO	= 0xE3007000
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
diff --git a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
new file mode 100644
index 0000000..48708a8
--- /dev/null
+++ b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2008
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+
+static void wait_init_complete(void)
+{
+	u32 val;
+
+	do {
+		mfsdram(SDRAM_MCSTAT, val);
+	} while (!(val & 0x80000000));
+}
+
+long int initdram(int board_type)
+{
+	/*
+	 * Reset the DDR-SDRAM controller.
+	 */
+	mtsdr(SDR0_SRST, (0x80000000 >> 10));
+	mtsdr(SDR0_SRST, 0x00000000);
+
+	/*
+	 * These values are cloned from a running NOR booting
+	 * Canyonlands with SPD-DDR2 detection and calibration
+	 * enabled. This will only work for the same memory
+	 * configuration as used here:
+	 *
+	 * Crucial CT3264AC53E.4FD - 256MB SO-DIMM
+	 *
+	 */
+	mtsdram(SDRAM_MCOPT2, 0x00000000);
+	mtsdram(SDRAM_MCOPT1, 0x05122000);
+	mtsdram(SDRAM_MODT0, 0x01000000);
+	mtsdram(SDRAM_CODT, 0x00800021);
+	mtsdram(SDRAM_WRDTR, 0x82000823);
+	mtsdram(SDRAM_CLKTR, 0x40000000);
+	mtsdram(SDRAM_MB0CF, 0x00000201);
+	mtsdram(SDRAM_RTR, 0x06180000);
+	mtsdram(SDRAM_SDTR1, 0x80201000);
+	mtsdram(SDRAM_SDTR2, 0x42103243);
+	mtsdram(SDRAM_SDTR3, 0x0A0D0D16);
+	mtsdram(SDRAM_MMODE, 0x00000632);
+	mtsdram(SDRAM_MEMODE, 0x00000040);
+	mtsdram(SDRAM_INITPLR0, 0xB5380000);
+	mtsdram(SDRAM_INITPLR1, 0x82100400);
+	mtsdram(SDRAM_INITPLR2, 0x80820000);
+	mtsdram(SDRAM_INITPLR3, 0x80830000);
+	mtsdram(SDRAM_INITPLR4, 0x80810040);
+	mtsdram(SDRAM_INITPLR5, 0x80800532);
+	mtsdram(SDRAM_INITPLR6, 0x82100400);
+	mtsdram(SDRAM_INITPLR7, 0x8A080000);
+	mtsdram(SDRAM_INITPLR8, 0x8A080000);
+	mtsdram(SDRAM_INITPLR9, 0x8A080000);
+	mtsdram(SDRAM_INITPLR10, 0x8A080000);
+	mtsdram(SDRAM_INITPLR11, 0x80000432);
+	mtsdram(SDRAM_INITPLR12, 0x808103C0);
+	mtsdram(SDRAM_INITPLR13, 0x80810040);
+	mtsdram(SDRAM_INITPLR14, 0x00000000);
+	mtsdram(SDRAM_INITPLR15, 0x00000000);
+
+	mtsdram(SDRAM_MCOPT2, 0x28000000);
+
+	wait_init_complete();
+
+	mtdcr(SDRAM_R0BAS, 0x0000F800);		/* MQ0_B0BAS */
+
+	mtsdram(SDRAM_RDCC, 0x40000000);
+	mtsdram(SDRAM_RQDC, 0x80000038);
+	mtsdram(SDRAM_RFDC, 0x00000257);
+
+	return CFG_MBYTES_SDRAM << 20;
+}
diff --git a/nand_spl/board/amcc/canyonlands/u-boot.lds b/nand_spl/board/amcc/canyonlands/u-boot.lds
new file mode 100644
index 0000000..5bffb5b
--- /dev/null
+++ b/nand_spl/board/amcc/canyonlands/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2008
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc:common)
+SECTIONS
+{
+  .resetvec 0xE3003FFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  .text      :
+  {
+    start.o	(.text)
+    init.o	(.text)
+    nand_boot.o	(.text)
+    ddr2_fixed.o (.text)
+    ndfc.o	(.text)
+
+    *(.text)
+    *(.fixup)
+  }
+  _etext = .;
+
+  .data    :
+  {
+    *(.rodata*)
+    *(.data*)
+    *(.sdata*)
+    __got2_start = .;
+    *(.got2)
+    __got2_end = .;
+  }
+
+  _edata  =  .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.sbss)
+   *(.bss)
+  }
+
+  _end = . ;
+}