ppc4xx: Remove 4xx NAND booting support

As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.

This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>

4 files changed, 0 insertions, 288 deletions

diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile
deleted file mode 100644
index 250f083..0000000
--- a/nand_spl/board/amcc/canyonlands/Makefile
+++ /dev/null
@@ -1,75 +0,0 @@
-#
-# (C) Copyright 2008
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-	   $(LDFLAGS_FINAL)
-asflags-y += -DCONFIG_NAND_SPL
-ccflags-y += -DCONFIG_NAND_SPL
-
-SOBJS	:= start.o
-SOBJS	+= init.o
-SOBJS	+= resetvec.o
-COBJS	:= ddr2_fixed.o
-COBJS	+= nand_boot.o
-COBJS	+= nand_ecc.o
-COBJS	+= ndfc.o
-
-OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-targets += $(__OBJS)
-
-all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-		-Map $(nandobj)u-boot-spl.map -o $@
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links for common files
-
-# from cpu directory
-$(obj)/ndfc.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $@
-
-$(obj)/resetvec.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $@
-
-$(obj)/start.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $@
-
-# from board directory
-$(obj)/init.S:
-	@rm -f $@
-	ln -s $(SRCTREE)/board/amcc/canyonlands/init.S $@
-
-# from nand_spl directory
-$(obj)/nand_boot.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
-
-# from drivers/mtd/nand directory
-$(obj)/nand_ecc.c:
-	@rm -f $@
-	ln -s $(SRCTREE)/drivers/mtd/nand/nand_ecc.c $@
diff --git a/nand_spl/board/amcc/canyonlands/config.mk b/nand_spl/board/amcc/canyonlands/config.mk
deleted file mode 100644
index 780b7ae..0000000
--- a/nand_spl/board/amcc/canyonlands/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2008
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-#
-# AMCC 460EX Reference Platform (Canyonlands) board
-#
-
-#
-# CONFIG_SYS_TEXT_BASE for SPL:
-#
-# On 460EX platforms the SPL is located at 0xfffff000...0xffffffff,
-# in the last 4kBytes of memory space in cache.
-# We will copy this SPL into internal SRAM in start.S. So we set
-# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here.
-#
-CONFIG_SYS_TEXT_BASE = 0xE3003000
-
-# PAD_TO used to generate a 128kByte binary needed for the combined image
-# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x20000
-PAD_TO	= 0xE3023000
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
-endif
diff --git a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
deleted file mode 100644
index ce8515d..0000000
--- a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * (C) Copyright 2008-2009
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-
-/*
- * This code can configure those two Crucial SODIMM's:
- *
- * Crucial CT6464AC667.4FE - 512MB SO-DIMM (single rank)
- * Crucial CT6464AC667.8FB - 512MB SO-DIMM (dual rank)
- *
- */
-
-#define TEST_ADDR	0x10000000
-#define TEST_MAGIC	0x11223344
-
-static void wait_init_complete(void)
-{
-	u32 val;
-
-	do {
-		mfsdram(SDRAM_MCSTAT, val);
-	} while (!(val & 0x80000000));
-}
-
-static void ddr_start(void)
-{
-	mtsdram(SDRAM_MCOPT2, 0x28000000);
-	wait_init_complete();
-}
-
-static void ddr_init_common(void)
-{
-	/*
-	 * Reset the DDR-SDRAM controller.
-	 */
-	mtsdr(SDR0_SRST, SDR0_SRST0_DMC);
-	mtsdr(SDR0_SRST, 0x00000000);
-
-	/*
-	 * These values are cloned from a running NOR booting
-	 * Canyonlands with SPD-DDR2 detection and calibration
-	 * enabled. This will only work for the same memory
-	 * configuration as used here:
-	 *
-	 */
-	mtsdram(SDRAM_MCOPT2, 0x00000000);
-	mtsdram(SDRAM_MODT0, 0x01000000);
-	mtsdram(SDRAM_WRDTR, 0x82000823);
-	mtsdram(SDRAM_CLKTR, 0x40000000);
-	mtsdram(SDRAM_MB0CF, 0x00000201);
-	mtsdram(SDRAM_RTR, 0x06180000);
-	mtsdram(SDRAM_SDTR1, 0x80201000);
-	mtsdram(SDRAM_SDTR2, 0x42103243);
-	mtsdram(SDRAM_SDTR3, 0x0A0D0D16);
-	mtsdram(SDRAM_MMODE, 0x00000632);
-	mtsdram(SDRAM_MEMODE, 0x00000040);
-	mtsdram(SDRAM_INITPLR0, 0xB5380000);
-	mtsdram(SDRAM_INITPLR1, 0x82100400);
-	mtsdram(SDRAM_INITPLR2, 0x80820000);
-	mtsdram(SDRAM_INITPLR3, 0x80830000);
-	mtsdram(SDRAM_INITPLR4, 0x80810040);
-	mtsdram(SDRAM_INITPLR5, 0x80800532);
-	mtsdram(SDRAM_INITPLR6, 0x82100400);
-	mtsdram(SDRAM_INITPLR7, 0x8A080000);
-	mtsdram(SDRAM_INITPLR8, 0x8A080000);
-	mtsdram(SDRAM_INITPLR9, 0x8A080000);
-	mtsdram(SDRAM_INITPLR10, 0x8A080000);
-	mtsdram(SDRAM_INITPLR11, 0x80000432);
-	mtsdram(SDRAM_INITPLR12, 0x808103C0);
-	mtsdram(SDRAM_INITPLR13, 0x80810040);
-	mtsdram(SDRAM_RDCC, 0x40000000);
-	mtsdram(SDRAM_RQDC, 0x80000038);
-	mtsdram(SDRAM_RFDC, 0x00000257);
-
-	mtdcr(SDRAM_R0BAS, 0x0000F800);		/* MQ0_B0BAS */
-}
-
-phys_size_t initdram(int board_type)
-{
-	/*
-	 * First try init for this module:
-	 *
-	 * Crucial CT6464AC667.8FB - 512MB SO-DIMM (dual rank)
-	 */
-
-	ddr_init_common();
-
-	/*
-	 * Crucial CT6464AC667.8FB - 512MB SO-DIMM
-	 */
-	mtdcr(SDRAM_R0BAS, 0x0000F800);
-	mtdcr(SDRAM_R1BAS, 0x0400F800);
-	mtsdram(SDRAM_MCOPT1, 0x05122000);
-	mtsdram(SDRAM_CODT, 0x02800021);
-	mtsdram(SDRAM_MB1CF, 0x00000201);
-
-	ddr_start();
-
-	/*
-	 * Now test if the dual-ranked module is really installed
-	 * by checking an address in the upper 256MByte region
-	 */
-	out_be32((void *)TEST_ADDR, TEST_MAGIC);
-	if (in_be32((void *)TEST_ADDR) != TEST_MAGIC) {
-		/*
-		 * The test failed, so we assume that the single
-		 * ranked module is installed:
-		 *
-		 * Crucial CT6464AC667.4FE - 512MB SO-DIMM (single rank)
-		 */
-
-		ddr_init_common();
-
-		mtdcr(SDRAM_R0BAS, 0x0000F000);
-		mtsdram(SDRAM_MCOPT1, 0x05322000);
-		mtsdram(SDRAM_CODT, 0x00800021);
-
-		ddr_start();
-	}
-
-	return CONFIG_SYS_MBYTES_SDRAM << 20;
-}
diff --git a/nand_spl/board/amcc/canyonlands/u-boot.lds b/nand_spl/board/amcc/canyonlands/u-boot.lds
deleted file mode 100644
index 6383b1a..0000000
--- a/nand_spl/board/amcc/canyonlands/u-boot.lds
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * (C) Copyright 2008
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc:common)
-SECTIONS
-{
-  .resetvec 0xE3003FFC :
-  {
-    KEEP(*(.resetvec))
-  } = 0xffff
-
-  .text      :
-  {
-    start.o	(.text)
-    init.o	(.text)
-    nand_boot.o	(.text)
-    ddr2_fixed.o (.text)
-    ndfc.o	(.text)
-
-    *(.text)
-    *(.fixup)
-  }
-  _etext = .;
-
-  .data    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-    *(.data*)
-    *(.sdata*)
-    __got2_start = .;
-    *(.got2)
-    __got2_end = .;
-  }
-
-  _edata  =  .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss)
-   *(.bss)
-   . = ALIGN(4);
-  }
-
-  __bss_end = . ;
-}