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author | Wolfgang Denk <wd@denx.de> | 2008-12-16 17:16:34 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-12-16 17:16:34 +0100 |
commit | 7f202217356f19e519e6ec57a29de9af73067037 (patch) | |
tree | 1c3fe822cc37bf4df09ac9ece94c8a71ab9a25d0 /lib_ppc/cache.c | |
parent | 6cdadcb3f1b6eac4a1c4256acaa1438413f95351 (diff) | |
parent | 584eedab66d0828f2d571a24b10526c4e65f547b (diff) | |
download | u-boot-imx-7f202217356f19e519e6ec57a29de9af73067037.zip u-boot-imx-7f202217356f19e519e6ec57a29de9af73067037.tar.gz u-boot-imx-7f202217356f19e519e6ec57a29de9af73067037.tar.bz2 |
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
Diffstat (limited to 'lib_ppc/cache.c')
-rw-r--r-- | lib_ppc/cache.c | 36 |
1 files changed, 17 insertions, 19 deletions
diff --git a/lib_ppc/cache.c b/lib_ppc/cache.c index 72c838e..1292b71 100644 --- a/lib_ppc/cache.c +++ b/lib_ppc/cache.c @@ -25,29 +25,27 @@ #include <asm/cache.h> #include <watchdog.h> -void flush_cache (ulong start_addr, ulong size) +void flush_cache(ulong start_addr, ulong size) { #ifndef CONFIG_5xx - ulong addr, end_addr = start_addr + size; + ulong addr, start, end; - if (CONFIG_SYS_CACHELINE_SIZE) { - addr = start_addr & (CONFIG_SYS_CACHELINE_SIZE - 1); - for (addr = start_addr; - addr < end_addr; - addr += CONFIG_SYS_CACHELINE_SIZE) { - asm ("dcbst 0,%0": :"r" (addr)); - WATCHDOG_RESET(); - } - asm ("sync"); /* Wait for all dcbst to complete on bus */ + start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1); + end = start_addr + size - 1; - for (addr = start_addr; - addr < end_addr; - addr += CONFIG_SYS_CACHELINE_SIZE) { - asm ("icbi 0,%0": :"r" (addr)); - WATCHDOG_RESET(); - } + for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) { + asm volatile("dcbst 0,%0" : : "r" (addr) : "memory"); + WATCHDOG_RESET(); } - asm ("sync"); /* Always flush prefetch queue in any case */ - asm ("isync"); + /* wait for all dcbst to complete on bus */ + asm volatile("sync" : : : "memory"); + + for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) { + asm volatile("icbi 0,%0" : : "r" (addr) : "memory"); + WATCHDOG_RESET(); + } + asm volatile("sync" : : : "memory"); + /* flush prefetch queue */ + asm volatile("isync" : : : "memory"); #endif } |