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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /lib_nios2/board.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'lib_nios2/board.c')
| -rw-r--r-- | lib_nios2/board.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib_nios2/board.c b/lib_nios2/board.c index 7ffb3f0..d759f0f 100644 --- a/lib_nios2/board.c +++ b/lib_nios2/board.c @@ -31,7 +31,7 @@ #ifdef CONFIG_STATUS_LED #include <status_led.h> #endif -#if defined(CFG_NIOS_EPCSBASE) +#if defined(CONFIG_SYS_NIOS_EPCSBASE) #include <nios2-epcs.h> #endif @@ -66,8 +66,8 @@ static ulong mem_malloc_brk = 0; */ static void mem_malloc_init (void) { - mem_malloc_start = CFG_MALLOC_BASE; - mem_malloc_end = mem_malloc_start + CFG_MALLOC_LEN; + mem_malloc_start = CONFIG_SYS_MALLOC_BASE; + mem_malloc_end = mem_malloc_start + CONFIG_SYS_MALLOC_LEN; mem_malloc_brk = mem_malloc_start; memset ((void *) mem_malloc_start, 0, @@ -96,7 +96,7 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, /* Call board-specific init code early.*/ #endif -#if defined(CFG_NIOS_EPCSBASE) +#if defined(CONFIG_SYS_NIOS_EPCSBASE) epcs_reset, #endif @@ -119,25 +119,25 @@ void board_init (void) int i; /* Pointer is writable since we allocated a register for it. - * Nios treats CFG_GBL_DATA_OFFSET as an address. + * Nios treats CONFIG_SYS_GBL_DATA_OFFSET as an address. */ - gd = (gd_t *)CFG_GBL_DATA_OFFSET; + gd = (gd_t *)CONFIG_SYS_GBL_DATA_OFFSET; /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory"); - memset( gd, 0, CFG_GBL_DATA_SIZE ); + memset( gd, 0, CONFIG_SYS_GBL_DATA_SIZE ); gd->bd = (bd_t *)(gd+1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; bd = gd->bd; - bd->bi_memstart = CFG_SDRAM_BASE; - bd->bi_memsize = CFG_SDRAM_SIZE; - bd->bi_flashstart = CFG_FLASH_BASE; -#if defined(CFG_SRAM_BASE) && defined(CFG_SRAM_SIZE) - bd->bi_sramstart= CFG_SRAM_BASE; - bd->bi_sramsize = CFG_SRAM_SIZE; + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; +#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE) + bd->bi_sramstart= CONFIG_SYS_SRAM_BASE; + bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif bd->bi_baudrate = CONFIG_BAUDRATE; |