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authorPeter Tyser <ptyser@xes-inc.com>2009-07-17 10:14:48 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-07-22 09:43:48 -0500
commitd9c147f371800a479a507a816b2fe572c97da197 (patch)
tree65391575bc175d4fb20632b2f6d03fa6b47448d3 /lib_microblaze
parent12a440ae6d09445140f1a0c2023dba76a9f1a617 (diff)
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85xx, 86xx: Add common board_add_ram_info()
Previously, 85xx and 86xx boards would display DRAM information on bootup such as: ... I2C: ready DRAM: Memory controller interleaving enabled: Bank interleaving! 2 GB FLASH: 256 MB ... This patch moves the printing of the DRAM controller configuration to a common board_add_ram_info() function which prints out DDR type, width, CAS latency, and ECC mode. It also makes the DDR interleaving information print out in a more sane manner: ... I2C: ready DRAM: 2 GB (DDR2, 64-bit, CL=4, ECC on) DDR Controller Interleaving Mode: bank FLASH: 256 MB ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'lib_microblaze')
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