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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-10-02 19:05:53 +0200
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-10-02 19:05:53 +0200
commitb90296fc39a33f84bb2b0aa79bf997be495ba791 (patch)
tree4ea0d61df25d10fe7552aedf781fd167f4c670fe /lib_m68k
parente80e585b00fbbab7ad1bf71619741f2c5b029ab7 (diff)
parent527c80f012030fa0b51f8594847ec56c9317e9b1 (diff)
downloadu-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.zip
u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.gz
u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.bz2
Merge commit 'origin/master'
Diffstat (limited to 'lib_m68k')
-rw-r--r--lib_m68k/Makefile2
-rw-r--r--lib_m68k/board.c98
-rw-r--r--lib_m68k/interrupts.c115
-rw-r--r--lib_m68k/m68k_linux.c378
-rw-r--r--lib_m68k/time.c250
5 files changed, 497 insertions, 346 deletions
diff --git a/lib_m68k/Makefile b/lib_m68k/Makefile
index 82165f0..03784fd 100644
--- a/lib_m68k/Makefile
+++ b/lib_m68k/Makefile
@@ -27,7 +27,7 @@ LIB = $(obj)lib$(ARCH).a
SOBJS =
-COBJS = cache.o traps.o time.o board.o m68k_linux.o
+COBJS = cache.o traps.o time.o interrupts.o board.o m68k_linux.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/lib_m68k/board.c b/lib_m68k/board.c
index 293fd04..43f97c4 100644
--- a/lib_m68k/board.c
+++ b/lib_m68k/board.c
@@ -30,9 +30,7 @@
#include <malloc.h>
#include <devices.h>
-#ifdef CONFIG_M5272
-#include <asm/immap_5272.h>
-#endif
+#include <asm/immap.h>
#if defined(CONFIG_CMD_IDE)
#include <ide.h>
@@ -139,19 +137,19 @@ void *sbrk (ptrdiff_t increment)
char *strmhz(char *buf, long hz)
{
- long l, n;
- long m;
+ long l, n;
+ long m;
- n = hz / 1000000L;
+ n = hz / 1000000L;
- l = sprintf (buf, "%ld", n);
+ l = sprintf (buf, "%ld", n);
- m = (hz % 1000000L) / 1000L;
+ m = (hz % 1000000L) / 1000L;
- if (m != 0)
- sprintf (buf+l, ".%03ld", m);
+ if (m != 0)
+ sprintf (buf+l, ".%03ld", m);
- return (buf);
+ return (buf);
}
/*
@@ -169,7 +167,7 @@ char *strmhz(char *buf, long hz)
typedef int (init_fnc_t) (void);
/************************************************************************
- * Init Utilities *
+ * Init Utilities
************************************************************************
* Some of this code should be moved into the core functions,
* but let's get it working (again) first...
@@ -221,6 +219,7 @@ static int init_func_i2c (void)
*/
init_fnc_t *init_sequence[] = {
+ get_clocks,
env_init,
init_baudrate,
serial_init,
@@ -371,6 +370,10 @@ board_init_f (ulong bootflag)
*/
bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
+#ifdef CFG_INIT_RAM_ADDR
+ bd->bi_sramstart = CFG_INIT_RAM_ADDR; /* start of SRAM memory */
+ bd->bi_sramsize = CFG_INIT_RAM_END; /* size of SRAM memory */
+#endif
bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
@@ -378,6 +381,14 @@ board_init_f (ulong bootflag)
WATCHDOG_RESET ();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
+#ifdef CONFIG_PCI
+ bd->bi_pcifreq = gd->pci_clk; /* PCI Freq in Hz */
+#endif
+#ifdef CONFIG_EXTRA_CLOCK
+ bd->bi_inpfreq = gd->inp_clk; /* input Freq in Hz */
+ bd->bi_vcofreq = gd->vco_clk; /* vco Freq in Hz */
+ bd->bi_flbfreq = gd->flb_clk; /* flexbus Freq in Hz */
+#endif
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
#ifdef CFG_EXTBDINFO
@@ -430,6 +441,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
+#ifdef CONFIG_SERIAL_MULTI
+ serial_initialize();
+#endif
+
debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
WATCHDOG_RESET ();
@@ -489,7 +504,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
/*
* Setup trap handlers
*/
- trap_init (0);
+ trap_init (CFG_SDRAM_BASE);
#if !defined(CFG_NO_FLASH)
puts ("FLASH: ");
@@ -562,12 +577,48 @@ void board_init_r (gd_t *id, ulong dest_addr)
if (s)
s = (*e) ? e + 1 : e;
}
+#ifdef CONFIG_HAS_ETH1
+ /* handle the 2nd ethernet address */
+
+ s = getenv ("eth1addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
+#ifdef CONFIG_HAS_ETH2
+ /* handle the 3rd ethernet address */
+
+ s = getenv ("eth2addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
+
+#ifdef CONFIG_HAS_ETH3
+ /* handle 4th ethernet address */
+ s = getenv("eth3addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
/* IP Address */
bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
WATCHDOG_RESET ();
+#if defined(CONFIG_PCI)
+ /*
+ * Do pci configuration
+ */
+ pci_init ();
+#endif
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize devices */
@@ -640,15 +691,34 @@ void board_init_r (gd_t *id, ulong dest_addr)
nand_init(); /* go init the NAND */
#endif
-#if defined(CONFIG_CMD_NET) && defined(FEC_ENET)
+#if defined(CONFIG_CMD_NET)
WATCHDOG_RESET();
+#if defined(FEC_ENET)
eth_init(bd);
#endif
+#if defined(CONFIG_NET_MULTI)
+ puts ("Net: ");
+ eth_initialize (bd);
+#endif
+#endif
#ifdef CONFIG_POST
post_run (NULL, POST_RAM | post_bootmode_get(0));
#endif
+#if defined(CONFIG_CMD_PCMCIA) \
+ && !defined(CONFIG_CMD_IDE)
+ WATCHDOG_RESET ();
+ puts ("PCMCIA:");
+ pcmcia_init ();
+#endif
+
+#if defined(CONFIG_CMD_IDE)
+ WATCHDOG_RESET ();
+ puts ("IDE: ");
+ ide_init ();
+#endif
+
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET ();
/*
diff --git a/lib_m68k/interrupts.c b/lib_m68k/interrupts.c
new file mode 100644
index 0000000..1635d6f
--- /dev/null
+++ b/lib_m68k/interrupts.c
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2007 Freescale Semiconductor Inc
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/processor.h>
+#include <asm/immap.h>
+
+#define NR_IRQS (CFG_NUM_IRQS)
+
+/*
+ * Interrupt vector functions.
+ */
+struct interrupt_action {
+ interrupt_handler_t *handler;
+ void *arg;
+};
+
+static struct interrupt_action irq_vecs[NR_IRQS];
+
+static __inline__ unsigned short get_sr (void)
+{
+ unsigned short sr;
+
+ asm volatile ("move.w %%sr,%0":"=r" (sr):);
+
+ return sr;
+}
+
+static __inline__ void set_sr (unsigned short sr)
+{
+ asm volatile ("move.w %0,%%sr"::"r" (sr));
+}
+
+/************************************************************************/
+/*
+ * Install and free an interrupt handler
+ */
+void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
+{
+ if ((vec < 0) || (vec > NR_IRQS)) {
+ printf ("irq_install_handler: wrong interrupt vector %d\n",
+ vec);
+ return;
+ }
+
+ irq_vecs[vec].handler = handler;
+ irq_vecs[vec].arg = arg;
+}
+
+void irq_free_handler (int vec)
+{
+ if ((vec < 0) || (vec > NR_IRQS)) {
+ return;
+ }
+
+ irq_vecs[vec].handler = NULL;
+ irq_vecs[vec].arg = NULL;
+}
+
+void enable_interrupts (void)
+{
+ unsigned short sr;
+
+ sr = get_sr ();
+ set_sr (sr & ~0x0700);
+}
+
+int disable_interrupts (void)
+{
+ unsigned short sr;
+
+ sr = get_sr ();
+ set_sr (sr | 0x0700);
+
+ return ((sr & 0x0700) == 0); /* return TRUE, if interrupts were enabled before */
+}
+
+void int_handler (struct pt_regs *fp)
+{
+ int vec;
+
+ vec = (fp->vector >> 2) & 0xff;
+ if (vec > 0x40)
+ vec -= 0x40;
+
+ if (irq_vecs[vec].handler != NULL) {
+ irq_vecs[vec].handler (irq_vecs[vec].arg);
+ } else {
+ printf ("\nBogus External Interrupt Vector %d\n", vec);
+ }
+}
diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c
index 6c194f8..bea9744 100644
--- a/lib_m68k/m68k_linux.c
+++ b/lib_m68k/m68k_linux.c
@@ -25,6 +25,8 @@
#include <command.h>
#include <image.h>
#include <zlib.h>
+#include <bzlib.h>
+#include <environment.h>
#include <asm/byteorder.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -34,103 +36,190 @@ DECLARE_GLOBAL_DATA_PTR;
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-extern image_header_t header; /* from cmd_bootm.c */
-
-extern int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
-
-static int linux_argc;
-static char **linux_argv;
-
-static char **linux_env;
-static char *linux_env_p;
-static int linux_env_idx;
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+# include <status_led.h>
+# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
-static void linux_params_init (ulong start, char *commandline);
-static void linux_env_set (char *env_name, char *env_val);
+extern image_header_t header;
-void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
- ulong addr, ulong * len_ptr, int verify)
+void do_bootm_linux(cmd_tbl_t * cmdtp, int flag,
+ int argc, char *argv[],
+ ulong addr, ulong * len_ptr, int verify)
{
- ulong len = 0, checksum;
+ ulong sp;
+ ulong len, checksum;
ulong initrd_start, initrd_end;
+ ulong cmd_start, cmd_end;
+ ulong initrd_high;
ulong data;
- void (*theKernel) (int, char **, char **, int *);
+ int initrd_copy_to_ram = 1;
+ char *cmdline;
+ char *s;
+ bd_t *kbd;
+ void (*kernel) (bd_t *, ulong, ulong, ulong, ulong);
image_header_t *hdr = &header;
- char *commandline = getenv ("bootargs");
- char env_buf[12];
- theKernel =
- (void (*)(int, char **, char **, int *)) ntohl (hdr->ih_ep);
+ if ((s = getenv("initrd_high")) != NULL) {
+ /* a value of "no" or a similar string will act like 0,
+ * turning the "load high" feature off. This is intentional.
+ */
+ initrd_high = simple_strtoul(s, NULL, 16);
+ if (initrd_high == ~0)
+ initrd_copy_to_ram = 0;
+ } else { /* not set, no restrictions to load high */
+ initrd_high = ~0;
+ }
+
+#ifdef CONFIG_LOGBUFFER
+ kbd = gd->bd;
+ /* Prevent initrd from overwriting logbuffer */
+ if (initrd_high < (kbd->bi_memsize - LOGBUFF_LEN - LOGBUFF_OVERHEAD))
+ initrd_high = kbd->bi_memsize - LOGBUFF_LEN - LOGBUFF_OVERHEAD;
+ debug("## Logbuffer at 0x%08lX ", kbd->bi_memsize - LOGBUFF_LEN);
+#endif
+
+ /*
+ * Booting a (Linux) kernel image
+ *
+ * Allocate space for command line and board info - the
+ * address should be as high as possible within the reach of
+ * the kernel (see CFG_BOOTMAPSZ settings), but in unused
+ * memory, which means far enough below the current stack
+ * pointer.
+ */
+ asm("movel %%a7, %%d0\n"
+ "movel %%d0, %0\n": "=d"(sp): :"%d0");
+
+ debug("## Current stack ends at 0x%08lX ", sp);
+
+ sp -= 2048; /* just to be sure */
+ if (sp > CFG_BOOTMAPSZ)
+ sp = CFG_BOOTMAPSZ;
+ sp &= ~0xF;
+
+ debug("=> set upper limit to 0x%08lX\n", sp);
+
+ cmdline = (char *)((sp - CFG_BARGSIZE) & ~0xF);
+ kbd = (bd_t *) (((ulong) cmdline - sizeof(bd_t)) & ~0xF);
+
+ if ((s = getenv("bootargs")) == NULL)
+ s = "";
+
+ strcpy(cmdline, s);
+
+ cmd_start = (ulong) & cmdline[0];
+ cmd_end = cmd_start + strlen(cmdline);
+
+ *kbd = *(gd->bd);
+
+#ifdef DEBUG
+ printf("## cmdline at 0x%08lX ... 0x%08lX\n", cmd_start, cmd_end);
+
+ do_bdinfo(NULL, 0, 0, NULL);
+#endif
+
+ if ((s = getenv("clocks_in_mhz")) != NULL) {
+ /* convert all clock information to MHz */
+ kbd->bi_intfreq /= 1000000L;
+ kbd->bi_busfreq /= 1000000L;
+ }
+
+ kernel =
+ (void (*)(bd_t *, ulong, ulong, ulong, ulong))ntohl(hdr->ih_ep);
/*
* Check if there is an initrd image
*/
+
if (argc >= 3) {
- show_boot_progress (9);
+ debug("Not skipping initrd\n");
+ SHOW_BOOT_PROGRESS(9);
- addr = simple_strtoul (argv[2], NULL, 16);
+ addr = simple_strtoul(argv[2], NULL, 16);
- printf ("## Loading Ramdisk Image at %08lx ...\n", addr);
+ printf("## Loading RAMDisk Image at %08lx ...\n", addr);
/* Copy header so we can blank CRC field for re-calculation */
- memcpy (&header, (char *) addr, sizeof (image_header_t));
+ memmove(&header, (char *)addr, sizeof(image_header_t));
- if (ntohl (hdr->ih_magic) != IH_MAGIC) {
- printf ("Bad Magic Number\n");
- show_boot_progress (-10);
- do_reset (cmdtp, flag, argc, argv);
+ if (ntohl(hdr->ih_magic) != IH_MAGIC) {
+ puts("Bad Magic Number\n");
+ SHOW_BOOT_PROGRESS(-10);
+ do_reset(cmdtp, flag, argc, argv);
}
data = (ulong) & header;
- len = sizeof (image_header_t);
+ len = sizeof(image_header_t);
- checksum = ntohl (hdr->ih_hcrc);
+ checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
- if (crc32 (0, (char *) data, len) != checksum) {
- printf ("Bad Header Checksum\n");
- show_boot_progress (-11);
- do_reset (cmdtp, flag, argc, argv);
+ if (crc32(0, (uchar *) data, len) != checksum) {
+ puts("Bad Header Checksum\n");
+ SHOW_BOOT_PROGRESS(-11);
+ do_reset(cmdtp, flag, argc, argv);
}
- show_boot_progress (10);
+ SHOW_BOOT_PROGRESS(10);
- print_image_hdr (hdr);
+ print_image_hdr(hdr);
- data = addr + sizeof (image_header_t);
- len = ntohl (hdr->ih_size);
+ data = addr + sizeof(image_header_t);
+ len = ntohl(hdr->ih_size);
if (verify) {
ulong csum = 0;
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ ulong cdata = data, edata = cdata + len;
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
- printf (" Verifying Checksum ... ");
- csum = crc32 (0, (char *) data, len);
- if (csum != ntohl (hdr->ih_dcrc)) {
- printf ("Bad Data CRC\n");
- show_boot_progress (-12);
- do_reset (cmdtp, flag, argc, argv);
+ puts(" Verifying Checksum ... ");
+
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+
+ while (cdata < edata) {
+ ulong chunk = edata - cdata;
+
+ if (chunk > CHUNKSZ)
+ chunk = CHUNKSZ;
+ csum = crc32(csum, (uchar *) cdata, chunk);
+ cdata += chunk;
+
+ WATCHDOG_RESET();
}
- printf ("OK\n");
+#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
+ csum = crc32(0, (uchar *) data, len);
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
+
+ if (csum != ntohl(hdr->ih_dcrc)) {
+ puts("Bad Data CRC\n");
+ SHOW_BOOT_PROGRESS(-12);
+ do_reset(cmdtp, flag, argc, argv);
+ }
+ puts("OK\n");
}
- show_boot_progress (11);
+ SHOW_BOOT_PROGRESS(11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_M68K) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
- printf ("No Linux M68K Ramdisk Image\n");
- show_boot_progress (-13);
- do_reset (cmdtp, flag, argc, argv);
+ puts("No Linux ColdFire Ramdisk Image\n");
+ SHOW_BOOT_PROGRESS(-13);
+ do_reset(cmdtp, flag, argc, argv);
}
/*
* Now check if we have a multifile image
*/
} else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) {
- ulong tail = ntohl (len_ptr[0]) % 4;
+ u_long tail = ntohl(len_ptr[0]) % 4;
int i;
- show_boot_progress (13);
+ SHOW_BOOT_PROGRESS(13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -138,130 +227,111 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
for (i = 1; len_ptr[i]; ++i)
data += 4;
/* add kernel length, and align */
- data += ntohl (len_ptr[0]);
+ data += ntohl(len_ptr[0]);
if (tail) {
data += 4 - tail;
}
- len = ntohl (len_ptr[1]);
+ len = ntohl(len_ptr[1]);
} else {
/*
* no initrd image
*/
- show_boot_progress (14);
+ SHOW_BOOT_PROGRESS(14);
- data = 0;
+ len = data = 0;
}
-#ifdef DEBUG
if (!data) {
- printf ("No initrd\n");
+ debug("No initrd\n");
}
-#endif
if (data) {
- initrd_start = data;
- initrd_end = initrd_start + len;
- } else {
- initrd_start = 0;
- initrd_end = 0;
- }
-
- show_boot_progress (15);
-
-#ifdef DEBUG
- printf ("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong) theKernel);
-#endif
-
- linux_params_init (PHYSADDR (gd->bd->bi_boot_params), commandline);
-
- sprintf (env_buf, "%lu", gd->ram_size >> 20);
- linux_env_set ("memsize", env_buf);
-
- sprintf (env_buf, "0x%08X", (uint) PHYSADDR (initrd_start));
- linux_env_set ("initrd_start", env_buf);
-
- sprintf (env_buf, "0x%X", (uint) (initrd_end - initrd_start));
- linux_env_set ("initrd_size", env_buf);
-
- sprintf (env_buf, "0x%08X", (uint) (gd->bd->bi_flashstart));
- linux_env_set ("flash_start", env_buf);
-
- sprintf (env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
- linux_env_set ("flash_size", env_buf);
-
- /* we assume that the kernel is in place */
- printf ("\nStarting kernel ...\n\n");
-
- theKernel (linux_argc, linux_argv, linux_env, 0);
-}
-
-static void linux_params_init (ulong start, char *line)
-{
- char *next, *quote, *argp;
-
- linux_argc = 1;
- linux_argv = (char **) start;
- linux_argv[0] = 0;
- argp = (char *) (linux_argv + LINUX_MAX_ARGS);
-
- next = line;
-
- while (line && *line && linux_argc < LINUX_MAX_ARGS) {
- quote = strchr (line, '"');
- next = strchr (line, ' ');
-
- while (next != NULL && quote != NULL && quote < next) {
- /* we found a left quote before the next blank
- * now we have to find the matching right quote
- */
- next = strchr (quote + 1, '"');
- if (next != NULL) {
- quote = strchr (next + 1, '"');
- next = strchr (next + 1, ' ');
+ if (!initrd_copy_to_ram) { /* zero-copy ramdisk support */
+ initrd_start = data;
+ initrd_end = initrd_start + len;
+ } else {
+ initrd_start = (ulong) kbd - len;
+ initrd_start &= ~(4096 - 1); /* align on page */
+
+ if (initrd_high) {
+ ulong nsp;
+
+ /*
+ * the inital ramdisk does not need to be within
+ * CFG_BOOTMAPSZ as it is not accessed until after
+ * the mm system is initialised.
+ *
+ * do the stack bottom calculation again and see if
+ * the initrd will fit just below the monitor stack
+ * bottom without overwriting the area allocated
+ * above for command line args and board info.
+ */
+ asm("movel %%a7, %%d0\n"
+ "movel %%d0, %0\n": "=d"(nsp): :"%d0");
+
+ nsp -= 2048; /* just to be sure */
+ nsp &= ~0xF;
+
+ if (nsp > initrd_high) /* limit as specified */
+ nsp = initrd_high;
+
+ nsp -= len;
+ nsp &= ~(4096 - 1); /* align on page */
+
+ if (nsp >= sp)
+ initrd_start = nsp;
}
- }
- if (next == NULL) {
- next = line + strlen (line);
+ SHOW_BOOT_PROGRESS(12);
+
+ debug
+ ("## initrd at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
+ data, data + len - 1, len, len);
+
+ initrd_end = initrd_start + len;
+ printf(" Loading Ramdisk to %08lx, end %08lx ... ",
+ initrd_start, initrd_end);
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ {
+ size_t l = len;
+ void *to = (void *)initrd_start;
+ void *from = (void *)data;
+
+ while (l > 0) {
+ size_t tail =
+ (l > CHUNKSZ) ? CHUNKSZ : l;
+ WATCHDOG_RESET();
+ memmove(to, from, tail);
+ to += tail;
+ from += tail;
+ l -= tail;
+ }
+ }
+#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
+ memmove((void *)initrd_start, (void *)data, len);
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
+ puts("OK\n");
}
-
- linux_argv[linux_argc] = argp;
- memcpy (argp, line, next - line);
- argp[next - line] = 0;
-
- argp += next - line + 1;
- linux_argc++;
-
- if (*next)
- next++;
-
- line = next;
+ } else {
+ initrd_start = 0;
+ initrd_end = 0;
}
- linux_env = (char **) (((ulong) argp + 15) & ~15);
- linux_env[0] = 0;
- linux_env_p = (char *) (linux_env + LINUX_MAX_ENVS);
- linux_env_idx = 0;
-}
-
-static void linux_env_set (char *env_name, char *env_val)
-{
- if (linux_env_idx < LINUX_MAX_ENVS - 1) {
- linux_env[linux_env_idx] = linux_env_p;
-
- strcpy (linux_env_p, env_name);
- linux_env_p += strlen (env_name);
+ debug("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong) kernel);
- strcpy (linux_env_p, "=");
- linux_env_p += 1;
+ SHOW_BOOT_PROGRESS(15);
- strcpy (linux_env_p, env_val);
- linux_env_p += strlen (env_val);
-
- linux_env_p++;
- linux_env[++linux_env_idx] = 0;
- }
+ /*
+ * Linux Kernel Parameters (passing board info data):
+ * r3: ptr to board info data
+ * r4: initrd_start or 0 if no initrd
+ * r5: initrd_end - unused if r4 is 0
+ * r6: Start of command line string
+ * r7: End of command line string
+ */
+ (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
+ /* does not return */
}
diff --git a/lib_m68k/time.c b/lib_m68k/time.c
index 12e38f0..28d371d 100644
--- a/lib_m68k/time.c
+++ b/lib_m68k/time.c
@@ -25,41 +25,26 @@
#include <common.h>
-#include <asm/mcftimer.h>
+#include <asm/timer.h>
+#include <asm/immap.h>
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-#endif
+DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-#endif
+static ulong timestamp;
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
+#if defined(CONFIG_MCFTMR)
+#ifndef CFG_UDELAY_BASE
+# error "uDelay base not defined!"
#endif
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#include <asm/immap_5249.h>
+#if !defined(CFG_TMR_BASE) || !defined(CFG_INTR_BASE) || !defined(CFG_TMRINTR_NO) || !defined(CFG_TMRINTR_MASK)
+# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
#endif
+extern void dtimer_intr_setup(void);
-
-static ulong timestamp;
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
-static unsigned short lastinc;
-#endif
-
-
-#if defined(CONFIG_M5272)
-/*
- * We use timer 3 which is running with a period of 1 us
- */
void udelay(unsigned long usec)
{
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE3);
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_UDELAY_BASE);
uint start, now, tmp;
while (usec > 0) {
@@ -70,77 +55,84 @@ void udelay(unsigned long usec)
usec = usec - tmp;
/* Set up TIMER 3 as timebase clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
- timerp->timer_tcn = 0;
+ timerp->tmr = DTIM_DTMR_RST_RST;
+ timerp->tcn = 0;
/* set period to 1 us */
- timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
+ timerp->tmr =
+ CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR |
+ DTIM_DTMR_RST_EN;
- start = now = timerp->timer_tcn;
+ start = now = timerp->tcn;
while (now < start + tmp)
- now = timerp->timer_tcn;
+ now = timerp->tcn;
}
}
-void mcf_timer_interrupt (void * not_used){
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
+void dtimer_interrupt(void *not_used)
+{
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
- /* check for timer 4 interrupts */
- if ((intp->int_isr & 0x01000000) != 0) {
+ /* check for timer interrupt asserted */
+ if ((CFG_TMRPND_REG & CFG_TMRINTR_MASK) == CFG_TMRINTR_PEND) {
+ timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF);
+ timestamp++;
return;
}
-
- /* reset timer */
- timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
- timestamp ++;
}
-void timer_init (void) {
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
+void timer_init(void)
+{
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
timestamp = 0;
+ timerp->tcn = 0;
+ timerp->trr = 0;
+
/* Set up TIMER 4 as clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
+ timerp->tmr = DTIM_DTMR_RST_RST;
+
+ /* initialize and enable timer interrupt */
+ irq_install_handler(CFG_TMRINTR_NO, dtimer_interrupt, 0);
- /* initialize and enable timer 4 interrupt */
- irq_install_handler (72, mcf_timer_interrupt, 0);
- intp->int_icr1 |= 0x0000000d;
+ timerp->tcn = 0;
+ timerp->trr = 1000; /* Interrupt every ms */
+
+ dtimer_intr_setup();
- timerp->timer_tcn = 0;
- timerp->timer_trr = 1000; /* Interrupt every ms */
/* set a period of 1us, set timer mode to restart and enable timer and interrupt */
- timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
+ timerp->tmr = CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
+ DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
}
-void reset_timer (void)
+void reset_timer(void)
{
timestamp = 0;
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
return (timestamp - base);
}
-void set_timer (ulong t)
+void set_timer(ulong t)
{
timestamp = t;
}
+#endif /* CONFIG_MCFTMR */
+
+#if defined(CONFIG_MCFPIT)
+#if !defined(CFG_PIT_BASE)
+# error "CFG_PIT_BASE not defined!"
#endif
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
+static unsigned short lastinc;
void udelay(unsigned long usec)
{
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_UDELAY_BASE);
uint tmp;
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE3);
-
while (usec > 0) {
if (usec > 65000)
tmp = 65000;
@@ -149,55 +141,41 @@ void udelay(unsigned long usec)
usec = usec - tmp;
/* Set up TIMER 3 as timebase clock */
- timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
- timerp[MCFTIMER_PMR] = 0;
+ timerp->pcsr = PIT_PCSR_OVW;
+ timerp->pmr = 0;
/* set period to 1 us */
- timerp[MCFTIMER_PCSR] =
-#ifdef CONFIG_M5271
- (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#else /* !CONFIG_M5271 */
- (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#endif /* CONFIG_M5271 */
-
- timerp[MCFTIMER_PMR] = tmp;
- while (timerp[MCFTIMER_PCNTR] > 0);
+ timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
+
+ timerp->pmr = tmp;
+ while (timerp->pcntr > 0) ;
}
}
-void timer_init (void)
+void timer_init(void)
{
- volatile unsigned short *timerp;
-
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
timestamp = 0;
/* Set up TIMER 4 as poll clock */
- timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
- timerp[MCFTIMER_PMR] = lastinc = 0;
- timerp[MCFTIMER_PCSR] =
-#ifdef CONFIG_M5271
- (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#else /* !CONFIG_M5271 */
- (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#endif /* CONFIG_M5271 */
+ timerp->pcsr = PIT_PCSR_OVW;
+ timerp->pmr = lastinc = 0;
+ timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
}
-void set_timer (ulong t)
+void set_timer(ulong t)
{
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
timestamp = 0;
- timerp[MCFTIMER_PMR] = lastinc = 0;
+ timerp->pmr = lastinc = 0;
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
unsigned short now, diff;
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
- now = timerp[MCFTIMER_PCNTR];
+ now = timerp->pcntr;
diff = -(now - lastinc);
timestamp += diff;
@@ -205,94 +183,12 @@ ulong get_timer (ulong base)
return timestamp - base;
}
-void wait_ticks (unsigned long ticks)
+void wait_ticks(unsigned long ticks)
{
- set_timer (0);
- while (get_timer (0) < ticks);
+ set_timer(0);
+ while (get_timer(0) < ticks) ;
}
-#endif
-
-
-#if defined(CONFIG_M5249)
-/*
- * We use timer 1 which is running with a period of 1 us
- */
-void udelay(unsigned long usec)
-{
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE1);
- uint start, now, tmp;
-
- while (usec > 0) {
- if (usec > 65000)
- tmp = 65000;
- else
- tmp = usec;
- usec = usec - tmp;
-
- /* Set up TIMER 1 as timebase clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
- timerp->timer_tcn = 0;
- /* set period to 1 us */
- /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
- timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
-
- start = now = timerp->timer_tcn;
- while (now < start + tmp)
- now = timerp->timer_tcn;
- }
-}
-
-void mcf_timer_interrupt (void * not_used){
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
-
- /* check for timer 2 interrupts */
- if ((mbar_readLong(MCFSIM_IPR) & 0x00000400) == 0) {
- return;
- }
-
- /* reset timer */
- timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
- timestamp ++;
-}
-
-void timer_init (void) {
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
-
- timestamp = 0;
-
- /* Set up TIMER 2 as clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
-
- /* initialize and enable timer 2 interrupt */
- irq_install_handler (31, mcf_timer_interrupt, 0);
- mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
- mbar_writeByte(MCFSIM_TIMER2ICR, MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3);
-
- timerp->timer_tcn = 0;
- timerp->timer_trr = 1000; /* Interrupt every ms */
- /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
- /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
- timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
-}
-
-void reset_timer (void)
-{
- timestamp = 0;
-}
-
-ulong get_timer (ulong base)
-{
- return (timestamp - base);
-}
-
-void set_timer (ulong t)
-{
- timestamp = t;
-}
-#endif
-
+#endif /* CONFIG_MCFPIT */
/*
* This function is derived from PowerPC code (read timebase as long long).
@@ -307,7 +203,7 @@ unsigned long long get_ticks(void)
* This function is derived from PowerPC code (timebase clock frequency).
* On M68K it returns the number of timer ticks per second.
*/
-ulong get_tbclk (void)
+ulong get_tbclk(void)
{
ulong tbclk;
tbclk = CFG_HZ;