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authorGraeme Russ <graeme.russ@gmail.com>2009-02-24 21:14:45 +1100
committerWolfgang Denk <wd@denx.de>2009-03-20 22:39:13 +0100
commit8c63d47651f77d9fb887cad433370b866eb0a193 (patch)
tree3b1462085a3aceec7390c05e7ab8184124967d14 /lib_i386/pcat_timer.c
parent6d7f610b09f813b1239eedcbfe921cfd439aea25 (diff)
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Implement SC520 timers
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
Diffstat (limited to 'lib_i386/pcat_timer.c')
-rw-r--r--lib_i386/pcat_timer.c102
1 files changed, 102 insertions, 0 deletions
diff --git a/lib_i386/pcat_timer.c b/lib_i386/pcat_timer.c
new file mode 100644
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--- /dev/null
+++ b/lib_i386/pcat_timer.c
@@ -0,0 +1,102 @@
+/*
+ * (C) Copyright 2002
+ * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/i8254.h>
+#include <asm/ibmpc.h>
+
+#define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
+#define TIMER2_VALUE 0x0a8e /* 440Hz */
+
+int timer_init(void)
+{
+ /* initialize timer 0 and 2
+ *
+ * Timer 0 is used to increment system_tick 1000 times/sec
+ * Timer 1 was used for DRAM refresh in early PC's
+ * Timer 2 is used to drive the speaker
+ * (to stasrt a beep: write 3 to port 0x61,
+ * to stop it again: write 0)
+ */
+ outb (PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,
+ PIT_BASE + PIT_COMMAND);
+ outb (TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0);
+ outb (TIMER0_VALUE >> 8, PIT_BASE + PIT_T0);
+
+ outb (PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
+ PIT_BASE + PIT_COMMAND);
+ outb (TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
+ outb (TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
+
+ irq_install_handler (0, timer_isr, NULL);
+ unmask_irq (0);
+
+ return 0;
+}
+
+static u16 read_pit(void)
+{
+ u8 low;
+
+ outb (PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
+ low = inb (PIT_BASE + PIT_T0);
+
+ return ((inb (PIT_BASE + PIT_T0) << 8) | low);
+}
+
+/* this is not very exact */
+void udelay (unsigned long usec)
+{
+ int counter;
+ int wraps;
+
+ if (timer_init_done)
+ {
+ counter = read_pit ();
+ wraps = usec / 1000;
+ usec = usec % 1000;
+
+ usec *= 1194;
+ usec /= 1000;
+ usec += counter;
+
+ while (usec > 1194) {
+ usec -= 1194;
+ wraps++;
+ }
+
+ while (1) {
+ int new_count = read_pit ();
+
+ if (((new_count < usec) && !wraps) || wraps < 0)
+ break;
+
+ if (new_count > counter)
+ wraps--;
+
+ counter = new_count;
+ }
+ }
+
+}