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author | Jon Loeliger <jdl@freescale.com> | 2007-08-02 14:42:20 -0500 |
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committer | Jon Loeliger <jdl@freescale.com> | 2007-08-10 11:02:32 -0500 |
commit | cfc7a7f5bb3273c9951173c788001d45118f141f (patch) | |
tree | f321b9a57ce6d32567df53a53f9d97bbc9ee9665 /lib_blackfin/post.c | |
parent | 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f (diff) | |
download | u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.zip u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.gz u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.bz2 |
cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'lib_blackfin/post.c')
0 files changed, 0 insertions, 0 deletions