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author | Wolfgang Denk <wd@denx.de> | 2010-01-17 23:08:42 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-01-17 23:08:42 +0100 |
commit | 3e3989619f5ed3ee28002d985f3da28540586ab9 (patch) | |
tree | d4434455cafdc0c750aa26e642949232ffd0b2d3 /lib_blackfin/outs.S | |
parent | 64917ca38933d10b3763f61df7a1e58e1e127b52 (diff) | |
parent | 846a6391e4bc9fdd721753a1021953ff0ca17c27 (diff) | |
download | u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.zip u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.tar.gz u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Diffstat (limited to 'lib_blackfin/outs.S')
-rw-r--r-- | lib_blackfin/outs.S | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/lib_blackfin/outs.S b/lib_blackfin/outs.S new file mode 100644 index 0000000..90c6033 --- /dev/null +++ b/lib_blackfin/outs.S @@ -0,0 +1,60 @@ +/* + * Implementation of outs{bwl} for BlackFin processors using zero overhead loops. + * + * Copyright 2005-2009 Analog Devices Inc. + * 2005 BuyWays BV + * Bas Vermeulen <bas@buyways.nl> + * + * Licensed under the GPL-2. + */ + +#include <asm/linkage.h> + +.align 2 + +ENTRY(_outsl) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; +.Llong_loop_s: R0 = [P1++]; +.Llong_loop_e: [P0] = R0; + RTS; +ENDPROC(_outsl) + +ENTRY(_outsw) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; +.Lword_loop_s: R0 = W[P1++]; +.Lword_loop_e: W[P0] = R0; + RTS; +ENDPROC(_outsw) + +ENTRY(_outsb) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; +.Lbyte_loop_s: R0 = B[P1++]; +.Lbyte_loop_e: B[P0] = R0; + RTS; +ENDPROC(_outsb) + +ENTRY(_outsw_8) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R1 = B[P1++]; + R0 = B[P1++]; + R0 = R0 << 8; + R0 = R0 + R1; +.Lword8_loop_e: W[P0] = R0; + RTS; +ENDPROC(_outsw_8) |