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authorStephen Warren <swarren@nvidia.com>2015-10-02 17:44:06 -0600
committerSimon Glass <sjg@chromium.org>2015-10-23 09:42:28 -0600
commit4ea5243a3a2fbc59bbcdd401d75f1744bcd6280f (patch)
tree19498ea56e36d581174fd7d8a4f3d65730dd1e19 /lib
parent545dfd101400637219b7024ce0fc02728663380e (diff)
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fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
PCI addresses are always represented as 3 cells in DT. (one cell for bus and device, and two cells for a 64-bit addres). This does not vary based on either the physical address size of the CPU, nor any #address-cells property in DT (or more precisely, #address-cells must be set to 3 in any PCIe controller's node). Fix fdtdec_get_pci_addr() to use conversion functions that operate on (fixed) cell-sized data rather than (varying) physical-address-sized data, so that the function works on 64-bit systems. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/fdtdec.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1a86369..9db033a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -219,13 +219,13 @@ int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
for (i = 0; i < num; i++) {
debug("pci address #%d: %08lx %08lx %08lx\n", i,
- (ulong)fdt_addr_to_cpu(cell[0]),
- (ulong)fdt_addr_to_cpu(cell[1]),
- (ulong)fdt_addr_to_cpu(cell[2]));
- if ((fdt_addr_to_cpu(*cell) & type) == type) {
- addr->phys_hi = fdt_addr_to_cpu(cell[0]);
- addr->phys_mid = fdt_addr_to_cpu(cell[1]);
- addr->phys_lo = fdt_addr_to_cpu(cell[2]);
+ (ulong)fdt32_to_cpu(cell[0]),
+ (ulong)fdt32_to_cpu(cell[1]),
+ (ulong)fdt32_to_cpu(cell[2]));
+ if ((fdt32_to_cpu(*cell) & type) == type) {
+ addr->phys_hi = fdt32_to_cpu(cell[0]);
+ addr->phys_mid = fdt32_to_cpu(cell[1]);
+ addr->phys_lo = fdt32_to_cpu(cell[1]);
break;
} else {
cell += (FDT_PCI_ADDR_CELLS +