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authorSimon Glass <sjg@chromium.org>2013-03-11 06:08:06 +0000
committerSimon Glass <sjg@chromium.org>2013-03-19 08:45:37 -0700
commit1e566bc6dbcfc9f13909d5cb40dd74925bcdd579 (patch)
tree225721f4a7cdf6703a4b0408b1e63be1c649cc6f /lib/crc32.c
parent0c456cee952f3fa5ae6f5c42f960eeaa39140b62 (diff)
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sf: Respect maximum SPI write size
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of bytes that can be in a write transaction. Support this by breaking the writes into multiple transactions. Signed-off-by: Simon Glass <sjg@chromium.org>
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