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authorPeter Tyser <ptyser@xes-inc.com>2008-09-16 10:04:47 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-09-16 11:32:45 -0500
commitce47eb402c5e29a025399dc282246414fc492940 (patch)
tree993313336b71bf495461cc8dd89f8afbb8858c9b /include
parentc0d2f87d6c450128b88e73eea715fa3654f65b6c (diff)
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Support for multiple SGMII/TBI interfaces for TSEC ethernet
Fix TBI PHY accesses to use the proper offset in CPU register space. The previous code would incorrectly access the TBI PHY by reading/writing to CPU register space at the same location as would be used to access external PHYs. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>
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