diff options
author | Minkyu Kang <mk7.kang@samsung.com> | 2010-05-10 15:20:50 +0900 |
---|---|---|
committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-05-10 15:20:50 +0900 |
commit | 9d62f20d0861ef87460d073dc189c851715b46ae (patch) | |
tree | 43a05c86e947f01079879735ddf93218870df50b /include | |
parent | 6596753387c3310b86f75bebe464684d70651052 (diff) | |
parent | e0531f975ce124f4ebdd9c7b7b107673c5628f68 (diff) | |
download | u-boot-imx-9d62f20d0861ef87460d073dc189c851715b46ae.zip u-boot-imx-9d62f20d0861ef87460d073dc189c851715b46ae.tar.gz u-boot-imx-9d62f20d0861ef87460d073dc189c851715b46ae.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
arch/arm/include/asm/mach-types.h
common/serial.c
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include')
34 files changed, 805 insertions, 42 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 1478ec8..94695fc 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -435,7 +435,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 - +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* * Miscellaneous configurable options @@ -517,7 +517,8 @@ #define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ - HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index a8570ce..6972fe8 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -504,6 +504,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -535,8 +536,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 4046f80..7c84393 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -275,6 +275,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -437,8 +438,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 2ad5f60..7bd2793 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -286,6 +286,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -454,8 +455,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bf28d9e..73dbea4 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -296,6 +296,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -597,7 +598,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 52e2851..9be571f 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -63,6 +63,7 @@ /* * High Level Configuration Options */ +#define CONFIG_MPC83xx 1 #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ @@ -511,7 +512,8 @@ boards, we say we have two, but don't display a message if we find only one. */ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " @@ -595,8 +597,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) /* USB DR as device + USB MPH as host */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_INIT 0x00000000 +#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index b9b5eab..87a137b 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -320,6 +320,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -494,8 +495,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index c7bc9cd..e78cf60 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -250,6 +250,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -411,8 +412,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 65d49ec..b30d0e3 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -500,6 +500,7 @@ extern int board_pci_host_broken(void); #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -543,8 +544,9 @@ extern int board_pci_host_broken(void); /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ca60272..1654f46 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -508,6 +508,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -551,8 +552,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index f8b016f..26897c6 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -275,6 +275,7 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " @@ -320,7 +321,8 @@ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1 | SICRL_USB0) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 36e952e..84af8df 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -342,7 +342,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 - +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* * Miscellaneous configurable options @@ -411,8 +411,9 @@ | SICRL_ETSEC2_A ) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \ - | HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 4c909e6..c1e0e64 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -332,6 +332,8 @@ extern int tqm834x_num_flash_banks; #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ + #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */ #ifdef CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " @@ -403,7 +405,8 @@ extern int tqm834x_num_flash_banks; /* i-cache and d-cache disabled */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/aria.h b/include/configs/aria.h index 06763c5..c5f9cc1 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -78,6 +78,9 @@ #define CONFIG_SYS_DDR_SIZE 256 /* MB */ #define CONFIG_SYS_DDR_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 + +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 /* DDR Controller Configuration * @@ -190,7 +193,7 @@ /* * Backward compatible definitions, - * so we do not have to change arch/ppc/cpu/mpc512x/fixed_sdram.c + * so we do not have to change arch/powerpc/cpu/mpc512x/fixed_sdram.c */ #define CONFIG_SYS_DDRCMD_EM2 (CONFIG_SYS_MICRON_EMR2) #define CONFIG_SYS_DDRCMD_EM3 (CONFIG_SYS_MICRON_EMR3) diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 44669ea..29951f7 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -141,7 +141,7 @@ #define CONFIG_SYS_FLASH_BASE 0xfe000000 /* - * The flash size is autoconfigured, but arch/ppc/cpu/mpc5xxx/cpu_init.c needs this + * The flash size is autoconfigured, but arch/powerpc/cpu/mpc5xxx/cpu_init.c needs this * variable defined */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index e5537da..48dc946 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -230,7 +230,7 @@ * SDRAM Controller DDR autocalibration values and takes a lot longer * to run than Method_B. * (See the Method_A and Method_B algorithm discription in the file: - * arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) + * arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A * * DDR Autocalibration Method_B is the default. diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index d27b75b..6497231 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -367,7 +367,8 @@ * Core HID Setup */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index 3958d09..6883e79 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -290,7 +290,7 @@ * taken from the orignal Linkstation boot code * * Most of the low level configuration setttings are normally used - * in arch/ppc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. + * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. * Low level initialisation is done in board/linkstation/early_init.S * The values below are included for reference purpose only */ diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index cccc31d..92c4f5f 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -66,6 +66,9 @@ #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 + +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 /* DDR Controller Configuration * diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h new file mode 100644 index 0000000..96fab20 --- /dev/null +++ b/include/configs/mpc5121-common.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2010 DENX Software Engineering + * Anatolij Gustschin <agust@denx.de> + * + * Common configuration options for MPC5121 based boards + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MPC5121_COMMON_H +#define __MPC5121_COMMON_H + +/* Use SRAM for initial stack */ +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM base */ +#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of area */ + +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes of initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR + +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 + +/* + * Serial console + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_CMDLINE_EDITING 1 /* command line history */ +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif + +#endif /* __MPC5121_COMMON_H */ diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index fb49388..5281042 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -85,6 +85,9 @@ #endif #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 + +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 /* DDR Controller Configuration * diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h new file mode 100644 index 0000000..e83e1e3 --- /dev/null +++ b/include/configs/nios2-generic.h @@ -0,0 +1,153 @@ +/* + * (C) Copyright 2005, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt@psyent.com> + * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * BOARD/CPU + */ +#include "../board/altera/nios2-generic/custom_fpga.h" /* fpga parameters */ +#define CONFIG_BOARD_NAME "nios2-generic" /* custom board name */ +#define CONFIG_BOARD_EARLY_INIT_F /* enable early board-spec. init */ +#define CONFIG_SYS_NIOS_SYSID_BASE CONFIG_SYS_SYSID_BASE + +/* + * SERIAL + */ +#define CONFIG_ALTERA_UART +#if defined(CONFIG_ALTERA_JTAG_UART) +# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_JTAG_UART_BASE +#else +# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_UART_BASE +#endif + +#define CONFIG_ALTERA_JTAG_UART_BYPASS +#define CONFIG_SYS_NIOS_FIXEDBAUD +#define CONFIG_BAUDRATE CONFIG_SYS_UART_BAUD +#define CONFIG_SYS_BAUDRATE_TABLE {CONFIG_BAUDRATE} +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress console info */ + +/* + * TIMER + */ +#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_TIMER_BASE +#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_TIMER_IRQ +#define CONFIG_SYS_HZ 1000 /* Always 1000 */ +#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ +#define CONFIG_SYS_NIOS_TMRCNT \ + (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_TIMER_FREQ / 1000) - 1) + +/* + * STATUS LED + */ +#define CONFIG_STATUS_LED /* Enable status driver */ +#define CONFIG_EPLED /* Enable LED PIO driver */ +#define CONFIG_SYS_LEDPIO_ADDR LED_PIO_BASE + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BOOTD +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +#ifdef CONFIG_CMD_NET +# define CONFIG_NET_MULTI +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_PING +#endif + +/* + * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above + * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the + * reset address, no? This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + */ +#define CONFIG_ENV_IS_IN_FLASH + +#define CONFIG_ENV_SIZE 0x10000 /* 64k, 1 sector */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CONFIG_ENV_ADDR ((CONFIG_SYS_RESET_ADDR + \ + CONFIG_SYS_MONITOR_LEN) | \ + CONFIG_SYS_FLASH_BASE) + +/* + * MEMORY ORGANIZATION + * -Monitor at top of sdram. + * -The heap is placed below the monitor + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + */ +#define CONFIG_MONITOR_IS_IN_RAM +#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* Global data size rsvd */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x20000) +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - \ + CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET + +/* + * MISC + */ +#define CONFIG_SYS_LONGHELP /* Provide extended help */ +#define CONFIG_SYS_PROMPT "==> " /* Command prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */ +#define CONFIG_SYS_MAXARGS 16 /* Max command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Bootarg buf size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + \ + 16) /* Print buf size */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - 0x20000) +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h new file mode 100644 index 0000000..718abdf --- /dev/null +++ b/include/configs/pdm360ng.h @@ -0,0 +1,486 @@ +/* + * (C) Copyright 2009-2010 + * Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * pdm360ng board configuration file + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_PDM360NG 1 + +/* + * Memory map for the PDM360NG board: + * + * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB) + * 0x2000_0000 - 0x3FFF_FFFF reserved (DDR RAM (512 MB) + * 0x5000_0000 - 0x5001_FFFF SRAM (128 KB) + * 0x5004_0000 - 0x5005_FFFF MRAM (CS2) (128 KB) + * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB) + * 0xF000_0000 - 0xF7FF_FFFF NOR FLASH (CS0) (128 MB) + * 0xF800_0000 - 0xFFFF_FFFF NOR FLASH (CS1) (128 MB) optional + */ + +/* + * High Level Configuration Options + */ +#define CONFIG_E300 1 /* E300 Family */ +#define CONFIG_MPC512X 1 /* MPC512X family */ +#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ + +/* Used for silent command in environment */ +#define CONFIG_SYS_DEVICE_NULLDEV +#define CONFIG_SILENT_CONSOLE + +/* Video */ +#define CONFIG_VIDEO + +#if defined(CONFIG_VIDEO) +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_XRES 800 +#define CONFIG_VIDEO_YRES 480 +#endif + +#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ + +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_IMMR 0x80000000 +#define CONFIG_SYS_DIU_ADDR ((CONFIG_SYS_IMMR) + 0x2100) + +/* + * DDR Setup + */ + +/* DDR is system memory */ +#define CONFIG_SYS_DDR_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x40000000 + +/* DDR pin mux and slew rate */ +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000012 + +/* Manually set all parameters as there's no SPD etc. */ +/* + * DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3 + * + * SYS_CFG: + * [31:31] MDDRC Soft Reset: Diabled + * [30:30] DRAM CKE pin: Enabled + * [29:29] DRAM CLK: Enabled + * [28:28] Command Mode: Enabled (For initialization only) + * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] + * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] + * [20:19] Read Test: DON'T USE + * [18:18] Self Refresh: Enabled + * [17:17] 16bit Mode: Disabled + * [16:13] Read Delay: 3 + * [12:12] Half DQS Delay: Disabled + * [11:11] Quarter DQS Delay: Disabled + * [10:08] Write Delay: 2 + * [07:07] Early ODT: Disabled + * [06:06] On DIE Termination: Enabled + * [05:05] FIFO Overflow Clear: DON'T USE here + * [04:04] FIFO Underflow Clear: DON'T USE here + * [03:03] FIFO Overflow Pending: DON'T USE here + * [02:02] FIFO Underlfow Pending: DON'T USE here + * [01:01] FIFO Overlfow Enabled: Enabled + * [00:00] FIFO Underflow Enabled: Enabled + * TIME_CFG0 + * [31:16] DRAM Refresh Time: 0 CSB clocks + * [15:8] DRAM Command Time: 0 CSB clocks + * [07:00] DRAM Precharge Time: 0 CSB clocks + * TIME_CFG1 + * [31:26] DRAM tRFC: + * [25:21] DRAM tWR1: + * [20:17] DRAM tWRT1: + * [16:11] DRAM tDRR: + * [10:05] DRAM tRC: + * [04:00] DRAM tRAS: + * TIME_CFG2 + * [31:28] DRAM tRCD: + * [27:23] DRAM tFAW: + * [22:19] DRAM tRTW1: + * [18:15] DRAM tCCD: + * [14:10] DRAM tRTP: + * [09:05] DRAM tRP: + * [04:00] DRAM tRPA + */ +#define CONFIG_SYS_MDDRC_SYS_CFG 0xEA804A40 +#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E +#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168 +#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864 + +/* + * Alternative 1: small RAM (128 MB) configuration + */ +#define CONFIG_SYS_MDDRC_SYS_CFG_ALT1 0xE8604A40 +#define CONFIG_SYS_MDDRC_TIME_CFG0_ALT1 0x030C3D2E +#define CONFIG_SYS_MDDRC_TIME_CFG1_ALT1 0x3CEC1168 +#define CONFIG_SYS_MDDRC_TIME_CFG2_ALT1 0x33310863 + +#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 + +#define CONFIG_SYS_DDRCMD_NOP 0x01380000 +#define CONFIG_SYS_DDRCMD_PCHG_ALL 0x01100400 +#define CONFIG_SYS_DDRCMD_EM2 0x01020000 /* EMR2 */ +#define CONFIG_SYS_DDRCMD_EM3 0x01030000 /* EMR3 */ +/* EMR with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_EN_DLL 0x01010040 +#define CONFIG_SYS_DDRCMD_RES_DLL 0x01000100 +#define CONFIG_SYS_DDRCMD_RFSH 0x01080000 +#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 +/* EMR with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_OCD_DEFAULT 0x010107C0 +/* EMR new command with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_OCD_EXIT 0x01010440 + +/* DDR Priority Manager Configuration */ +#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 +#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 +#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 +#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC +#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA +#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 +#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 +#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 +#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 +#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 +#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 +#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa +#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa +#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 + +/* + * NOR FLASH on the Local Bus + */ +#define CONFIG_SYS_FLASH_CFI /* use Common Flash Interface */ +#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */ +#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max size of a Bank */ +/* start of FLASH-Bank1 */ +#define CONFIG_SYS_FLASH1_BASE (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_FLASH_SIZE) +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_FLASH_BANKS_LIST \ + {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE} + +#define CONFIG_SYS_SRAM_BASE 0x50000000 +#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ + +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS0_CFG 0x05059350 +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS1_CFG 0x05059350 + +#define CONFIG_SYS_MRAM_BASE 0x50040000 +#define CONFIG_SYS_MRAM_SIZE 0x00020000 +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS2_CFG 0x05059110 + +/* alt. CS timing for CS0, CS1, CS2 */ +#define CONFIG_SYS_CS_ALETIMING 0x00000007 + +/* + * NAND FLASH + */ +#define CONFIG_CMD_NAND /* enable NAND support */ +#define CONFIG_NAND_MPC5121_NFC +#define CONFIG_SYS_NAND_BASE 0x40000000 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE +#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */ + +/* + * Configuration parameters for MPC5121 NAND driver + */ +#define CONFIG_FSL_NFC_WIDTH 1 +#define CONFIG_FSL_NFC_WRITE_SIZE 2048 +#define CONFIG_FSL_NFC_SPARE_SIZE 64 +#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE + +/* + * Dynamic MTD partition support + */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=f0000000.flash,nor1=f8000000.flash," \ + "nand0=MPC5121 NAND" + +/* + * Flash layout + */ +#define MTDPARTS_DEFAULT "mtdparts=f0000000.flash:512k(u-boot)," \ + "256k(environment1)," \ + "256k(environment2)," \ + "256k(splash-factory)," \ + "2m(FIT: recovery)," \ + "4608k(fs-recovery)," \ + "256k(splash-customer),"\ + "5m(FIT: kernel+dtb)," \ + "64m(rootfs squash)ro," \ + "51m(userfs ubi);" \ + "f8000000.flash:-(unused);" \ + "MPC5121 NAND:1024m(extended-userfs)" + +/* + * Override partitions in device tree using info + * in "mtdparts" environment variable + */ +#ifdef CONFIG_CMD_MTDPARTS +#define CONFIG_FDT_FIXUP_PARTITIONS +#endif + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* 512 kB for monitor */ +#ifdef CONFIG_FSL_DIU_FB +#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* for malloc */ +#else +#define CONFIG_SYS_MALLOC_LEN (512 * 1024) +#endif + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 6 /* console is on PSC6 */ +#if CONFIG_PSC_CONSOLE != 6 +#error CONFIG_PSC_CONSOLE must be 6 +#endif + +#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC6_TX_SIZE +#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC6_TX_ADDR +#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC6_RX_SIZE +#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC6_RX_ADDR + +/* + * Used PSC UART devices + */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_PSC1 +#define CONFIG_SYS_PSC4 +#define CONFIG_SYS_PSC6 + +/* + * Co-processor communication parameters + */ +#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY 5000 +#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE 38400 + +/* + * I2C + */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE +/* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM addr */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* ST AT24C01 */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-Byte Write Mode */ + +/* + * MAC addr in EEPROM + */ +#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10 +/* + * Enabled only to delete "ethaddr" before testing + * "ethaddr" setting from EEPROM + */ +#define CONFIG_ENV_OVERWRITE + +/* + * Ethernet configuration + */ +#define CONFIG_MPC512x_FEC 1 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_ADDR 0x1F +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_FEC_AN_TIMEOUT 1 +#define CONFIG_HAS_ETH0 + +/* + * Configure on-board RTC + */ +#define CONFIG_RTC_M41T62 /* use M41T00 rtc via i2c */ +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + +/* + * Environment + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +/* This has to be a multiple of the Flash sector size */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO + +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ + +#ifdef CONFIG_CMD_KGDB + #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else + #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +/* Max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* Decrementer freq: 1ms ticks */ +#define CONFIG_SYS_HZ 1000 + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +/* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + +/* Cache Configuration */ +#define CONFIG_SYS_DCACHE_SIZE 32768 +#define CONFIG_SYS_CACHELINE_SIZE 32 +#ifdef CONFIG_CMD_KGDB +/* log base 2 of the above value */ +#define CONFIG_SYS_CACHELINE_SHIFT 5 +#endif + +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE) +#define CONFIG_SYS_HID2 HID2_HBE + +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +#ifdef CONFIG_SERIAL_MULTI +/* POST support */ +#define CONFIG_POST (CONFIG_SYS_POST_COPROC) +#endif + +/* + * Environment Configuration + */ +#define CONFIG_TIMESTAMP + +#define CONFIG_HOSTNAME pdm360ng +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 400000 + +#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ + +#define CONFIG_PREBOOT "echo;" \ + "echo PDM360NG SAMPLE;" \ + "echo" + +#define CONFIG_BOOTCOMMAND "run env_cont" + +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1 +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE + +#define OF_CPU "PowerPC,5121@0" +#define OF_SOC_COMPAT "fsl,mpc5121-immr" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@80000000/serial@11600" + +/* + * Include common options for all mpc5121 boards + */ +#include "mpc5121-common.h" + +#endif /* __CONFIG_H */ diff --git a/include/configs/qong.h b/include/configs/qong.h index 178c8e7..baf8481 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -64,6 +64,17 @@ #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE) #define CONFIG_NET_MULTI 1 +/* Framebuffer and LCD */ +#define CONFIG_LCD +#define CONFIG_VIDEO_MX3 +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_DISPLAY_VBEST_VGG322403 + /* * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the * initial TFTP transfer, should the user wish one, significantly. diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 2472187..5538b18 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -233,7 +233,7 @@ * Definitions for initial stack pointer and data area (in data cache) */ /* use on chip memory (OCM) for temperary stack until sdram is tested */ -/* see ./arch/ppc/cpu/ppc4xx/start.S */ +/* see ./arch/powerpc/cpu/ppc4xx/start.S */ #define CONFIG_SYS_TEMP_STACK_OCM 1 /* On Chip Memory location */ @@ -251,7 +251,7 @@ * Taken from PPCBoot board/icecube/icecube.h */ -/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */ +/* see ./arch/powerpc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */ #define CONFIG_SYS_EBC_PB0AP 0x04002480 /* AMD NOR flash - this corresponds to FLASH_BASE so may be correct */ #define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 @@ -269,7 +269,7 @@ * * Taken in part from PPCBoot board/icecube/icecube.h */ -/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */ +/* see ./arch/powerpc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */ #define CONFIG_SYS_GPIO0_OSRH 0x55555550 #define CONFIG_SYS_GPIO0_OSRL 0x00000110 #define CONFIG_SYS_GPIO0_ISR1H 0x00000000 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4ea65ce..deaddde 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -283,6 +283,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -541,7 +542,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 7423663..61eb26e 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -456,7 +456,7 @@ * - internal SRAM (OCM=On Chip Memory) is placed to CONFIG_SYS_OCM_DATA_ADDR * - Stackpointer will be located to * (CONFIG_SYS_INIT_RAM_ADDR&0xFFFF0000) | (CONFIG_SYS_INIT_SP_OFFSET&0x0000FFFF) - * in arch/ppc/cpu/ppc4xx/start.S + * in arch/powerpc/cpu/ppc4xx/start.S */ #undef CONFIG_SYS_INIT_DCACHE_CS @@ -495,7 +495,7 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /* ################################################################################### */ -/* These defines will be used in arch/ppc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ +/* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ /* They are currently undefined cause they are initiaized in board/solidcard3/init.S */ /* This chip select accesses the boot device */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 9641041..89f7cc4 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -174,7 +174,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc */ /* FPGA and NAND */ @@ -342,19 +342,19 @@ */ #include <config_cmd_default.h> +#define CONFIG_CMD_BMP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM +#define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_I2C #define CONFIG_CMD_SDRAM #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS +#undef CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_BMP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 7603300..f493e75 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -197,6 +197,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) #define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER @@ -448,7 +449,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index f9ae15a..477bbd7 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -90,6 +90,7 @@ #define PRSSTAT_CDPL (0x00040000) #define PRSSTAT_CINS (0x00010000) #define PRSSTAT_BREN (0x00000800) +#define PRSSTAT_BWEN (0x00000400) #define PRSSTAT_DLA (0x00000004) #define PRSSTAT_CICHB (0x00000002) #define PRSSTAT_CIDHB (0x00000001) @@ -121,6 +122,7 @@ #define XFERTYP_DMAEN 0x00000001 #define CINS_TIMEOUT 1000 +#define PIO_TIMEOUT 100000 #define DSADDR 0x2e004 diff --git a/include/i2c.h b/include/i2c.h index d828964..cd23c8a 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -111,6 +111,9 @@ void i2c_init(int speed, int slaveaddr); #ifdef CONFIG_SYS_I2C_INIT_BOARD void i2c_init_board(void); #endif +#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT +void i2c_board_late_init(void); +#endif #if defined(CONFIG_I2C_MUX) diff --git a/include/ns16550.h b/include/ns16550.h index ce606b5..9ea81e9 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -1,6 +1,6 @@ /* * NS16550 Serial Port - * originally from linux source (arch/ppc/boot/ns16550.h) + * originally from linux source (arch/powerpc/boot/ns16550.h) * * Cleanup and unification * (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH diff --git a/include/post.h b/include/post.h index ff83bce..3da959d 100644 --- a/include/post.h +++ b/include/post.h @@ -124,6 +124,7 @@ extern int post_hotkeys_pressed(void); #define CONFIG_SYS_POST_BSPEC4 0x00080000 #define CONFIG_SYS_POST_BSPEC5 0x00100000 #define CONFIG_SYS_POST_CODEC 0x00200000 +#define CONFIG_SYS_POST_COPROC 0x00400000 #endif /* CONFIG_POST */ diff --git a/include/serial.h b/include/serial.h index 4caf790..111edbe 100644 --- a/include/serial.h +++ b/include/serial.h @@ -9,6 +9,7 @@ struct serial_device { char ctlr[CTLRSIZE]; int (*init) (void); + int (*uninit) (void); void (*setbrg) (void); int (*getc) (void); int (*tstc) (void); @@ -37,6 +38,13 @@ extern struct serial_device eserial4_device; #endif +#if defined(CONFIG_MPC512X) +extern struct serial_device serial1_device; +extern struct serial_device serial3_device; +extern struct serial_device serial4_device; +extern struct serial_device serial6_device; +#endif + #if defined(CONFIG_S3C2410) extern struct serial_device s3c24xx_serial0_device; extern struct serial_device s3c24xx_serial1_device; @@ -84,4 +92,11 @@ extern int usbtty_tstc(void); #endif /* CONFIG_USB_TTY */ +#if defined(CONFIG_MPC512X) && defined(CONFIG_SERIAL_MULTI) +extern struct stdio_dev *open_port(int num, int baudrate); +extern int close_port(int num); +extern int write_port(struct stdio_dev *port, char *buf); +extern int read_port(struct stdio_dev *port, char *buf, int size); +#endif + #endif |