diff options
| author | Becky Bruce <beckyb@kernel.crashing.org> | 2010-12-17 17:17:58 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:19 -0600 |
| commit | 810c44274980d8bb9fa0d81d091a374adbae8309 (patch) | |
| tree | 438d669ac8481d5c0c1d52ca760b542f74049e19 /include | |
| parent | 70961ba41477a709870a01c86af2950124bb64fe (diff) | |
| download | u-boot-imx-810c44274980d8bb9fa0d81d091a374adbae8309.zip u-boot-imx-810c44274980d8bb9fa0d81d091a374adbae8309.tar.gz u-boot-imx-810c44274980d8bb9fa0d81d091a374adbae8309.tar.bz2 | |
85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN
This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it and were
undefining it.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/MPC8536DS.h | 1 | ||||
| -rw-r--r-- | include/configs/MPC8548CDS.h | 2 | ||||
| -rw-r--r-- | include/configs/MPC8572DS.h | 1 | ||||
| -rw-r--r-- | include/configs/P1_P2_RDB.h | 1 | ||||
| -rw-r--r-- | include/configs/SBC8540.h | 2 | ||||
| -rw-r--r-- | include/configs/TQM85xx.h | 2 | ||||
| -rw-r--r-- | include/configs/sbc8560.h | 2 | ||||
| -rw-r--r-- | include/configs/stxgp3.h | 2 | ||||
| -rw-r--r-- | include/configs/stxssa.h | 1 |
9 files changed, 5 insertions, 9 deletions
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7473834..71ffba3 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -144,7 +144,6 @@ #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD -#undef CONFIG_DDR_DLL #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b221a5c..e5ac3a9 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -89,7 +89,7 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#define CONFIG_DDR_DLL /* possible DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9d2e209..8cdcbea 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -131,7 +131,6 @@ #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD -#undef CONFIG_DDR_DLL #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 2dfee3d..d479a09 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -146,7 +146,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ -#undef CONFIG_DDR_DLL #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index fd9bacc..72559c0 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -118,7 +118,7 @@ #undef CONFIG_DDR_SPD #if defined(CONFIG_MPC85xx_REV1) - #define CONFIG_DDR_DLL /* possible DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #endif #undef CONFIG_DDR_ECC /* only for ECC DDR module */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index febe95d..79a958d 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -162,7 +162,7 @@ #if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8560) /* TQM8540 & 8560 need DLL-override */ -#define CONFIG_DDR_DLL /* DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_DDR_DEFAULT_CL 25 /* CAS latency 2,5 */ #endif /* CONFIG_TQM8540 || CONFIG_TQM8560 */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 101c5d9..435b148 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -116,7 +116,7 @@ #undef CONFIG_DDR_SPD #if defined(CONFIG_MPC85xx_REV1) - #define CONFIG_DDR_DLL /* possible DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #endif #undef CONFIG_DDR_ECC /* only for ECC DDR module */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index c2497ad..fc3881d 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -123,7 +123,7 @@ #undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#define CONFIG_DDR_DLL /* possible DLL fix needed */ +#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 996120a0..d5dd94f 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -135,7 +135,6 @@ #undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_DDR_DLL /* possible DLL fix needed */ #define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef |