diff options
| author | Wolfgang Grandegger <wg@denx.de> | 2009-10-23 12:03:13 +0200 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2009-10-31 12:13:28 +0100 |
| commit | c28d3bbe963f4c57937d6fdc1dd63cd3562c147c (patch) | |
| tree | 7bb2e6539685e5a72a222bb0a4364409d5d96aa7 /include | |
| parent | f2b4bc04d6aed6be712d236dab48ac4c4da22cbf (diff) | |
| download | u-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.zip u-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.tar.gz u-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.tar.bz2 | |
video: mb862xx: improve board-specific Lime configuration
To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/lwmon5.h | 10 | ||||
| -rw-r--r-- | include/configs/socrates.h | 5 | ||||
| -rw-r--r-- | include/mb862xx.h | 5 |
3 files changed, 14 insertions, 6 deletions
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 777a4d6..67434f5 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -495,8 +495,6 @@ /*----------------------------------------------------------------------- * Graphics (Fujitsu Lime) *----------------------------------------------------------------------*/ -/* SDRAM Clock frequency adjustment register */ -#define CONFIG_SYS_LIME_SDRAM_CLOCK 0xC1FC0038 /* Lime Clock frequency is to set 100MHz */ #define CONFIG_SYS_LIME_CLOCK_100MHZ 0x00000 #if 0 @@ -504,15 +502,15 @@ #define CONFIG_SYS_LIME_CLOCK_133MHZ 0x10000 #endif -/* SDRAM Parameter register */ -#define CONFIG_SYS_LIME_MMR 0xC1FCFFFC /* SDRAM parameter value; was 0x414FB7F2, caused several vertical bars and pixel flare on display when 133MHz was configured. According to SDRAM chip datasheet CAS Latency is 3 for 133MHz and -75 Speed Grade */ #ifdef CONFIG_SYS_LIME_CLOCK_133MHZ -#define CONFIG_SYS_LIME_MMR_VALUE 0x414FB7F3 +#define CONFIG_SYS_MB862xx_MMR 0x414FB7F3 +#define CONFIG_SYS_MB862xx_CCF CONFIG_SYS_LIME_CLOCK_133MHZ #else -#define CONFIG_SYS_LIME_MMR_VALUE 0x414FB7F2 +#define CONFIG_SYS_MB862xx_MMR 0x414FB7F2 +#define CONFIG_SYS_MB862xx_CCF CONFIG_SYS_LIME_CLOCK_100MHZ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 35feed0..3321aa2 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -210,6 +210,11 @@ #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ +/* SDRAM Clock frequency, 100MHz (0x0000) or 133MHz (0x10000) */ +#define CONFIG_SYS_MB862xx_CCF 0x10000 +/* SDRAM parameter */ +#define CONFIG_SYS_MB862xx_MMR 0x4157BA63 + /* Serial Port */ #define CONFIG_CONS_INDEX 1 diff --git a/include/mb862xx.h b/include/mb862xx.h index 43f01e7..009da03 100644 --- a/include/mb862xx.h +++ b/include/mb862xx.h @@ -32,6 +32,8 @@ #define PCI_DEVICE_ID_CORAL_P 0x2019 #define PCI_DEVICE_ID_CORAL_PA 0x201E +#define MB862XX_TYPE_LIME 0x1 + #define GC_HOST_BASE 0x01fc0000 #define GC_DISP_BASE 0x01fd0000 #define GC_DRAW_BASE 0x01ff0000 @@ -39,6 +41,7 @@ /* Host interface registers */ #define GC_SRST 0x0000002c #define GC_CCF 0x00000038 +#define GC_CID 0x000000f0 #define GC_MMR 0x0000fffc /* @@ -99,6 +102,7 @@ #define GC_FC 0x00000480 #define GC_BC 0x00000484 #define GC_FIFO 0x000004a0 +#define GC_REV 0x00008084 #define GC_GEO_FIFO 0x00008400 typedef struct { @@ -106,6 +110,7 @@ typedef struct { unsigned int value; } gdc_regs; +int mb862xx_probe(unsigned int addr); const gdc_regs *board_get_regs (void); unsigned int board_video_init (void); void board_backlight_switch(int); |