nios: remove nios-32 arch

The nios-32 arch is obsolete and broken. So it is removed.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>

13 files changed, 0 insertions, 3313 deletions

diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h
deleted file mode 100644
index 2d4fc77..0000000
--- a/include/configs/ADNPESC1.h
+++ /dev/null
@@ -1,689 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if	defined(CONFIG_NIOS_BASE_32)
-#include <configs/ADNPESC1_base_32.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS		1		/* NIOS-32 core		*/
-#define	CONFIG_ADNPESC1		1		/* SSV ADNP/ESC1 board	*/
-#define CONFIG_SYS_CLK_FREQ	CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock	*/
-#define	CONFIG_SYS_HZ			1000		/* 1 msec time tick	*/
-#define	CONFIG_BOARD_EARLY_INIT_F 1	/* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE		CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#if	defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE)
-
-#define	CONFIG_SYS_SRAM_BASE		CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define	CONFIG_SYS_SRAM_SIZE		CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-
-#else
-
-#undef	CONFIG_SYS_SRAM_BASE
-#undef	CONFIG_SYS_SRAM_SIZE
-
-#endif
-
-#define CONFIG_SYS_VECT_BASE		CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately -- this is very important if you plan to move your
- * memory to another place as configured at this time !!!).
- *
- *	-The heap is placed below the monitor.
- *	-Global data is placed below the heap.
- *	-The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256k		*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE		CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT	128		/* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1		/* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	8000		/* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	100		/* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE	unsigned short	/* flash word size	*/
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define	CONFIG_ENV_IS_IN_FLASH	1		/* Environment in flash */
-
-/* Mem addr of environment */
-#if	defined(CONFIG_NIOS_BASE_32)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR
-#endif
-
-#define CONFIG_ENV_SIZE		(64 * 1024)	/* 64 KByte (1 sector)	*/
-#define CONFIG_ENV_OVERWRITE			/* Serial/eth change Ok */
-
-#else
-#define	CONFIG_ENV_IS_NOWHERE	1		/* NO Environment	*/
-#endif
-
-/*------------------------------------------------------------------------
- * NIOS APPLICATION CODE BASE AREA
- *----------------------------------------------------------------------*/
-#if	((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) == 0x1050000)
-#define	CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR	"0x2000100"
-#define CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY	"0x1050000"
-#define CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT	"0x105000c"
-#define	CONFIG_SYS_ADNPESC1_NIOS_APPL_END	"0x11fffff"
-#define CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE	"0x1200000"
-#define	CONFIG_SYS_ADNPESC1_FILESYSTEM_END	"0x17fffff"
-#else
-#error *** CONFIG_SYS_ERROR: missing right appl.code base configuration, expand your config.h
-#endif
-#define CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER	"Nios"
-
-/*------------------------------------------------------------------------
- * BOOT ENVIRONMENT
- *----------------------------------------------------------------------*/
-#ifdef	CONFIG_DNPEVA2			/* DNP/EVA2 base board */
-#define	CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF	"sled boot off; "
-#define	CONFIG_SYS_ADNPESC1_SLED_RED_BLINK	"sled red blink; "
-#else
-#define	CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF
-#define	CONFIG_SYS_ADNPESC1_SLED_RED_BLINK
-#endif
-
-#define	CONFIG_BOOTDELAY	5
-#define	CONFIG_BOOTCOMMAND						\
-	"if itest.s *$appl_ident_addr == \"$appl_ident_str\"; "		\
-	"then "								\
-		"wd off; "						\
-		CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF				\
-		"go $appl_entry_addr; "					\
-	"else "								\
-		CONFIG_SYS_ADNPESC1_SLED_RED_BLINK				\
-		"echo *** missing \"$appl_ident_str\" at $appl_ident_addr; "\
-		"echo *** invalid application at $appl_entry_addr; "	\
-		"echo *** stop bootup...; "				\
-	"fi"
-
-/*------------------------------------------------------------------------
- * EXTRA ENVIRONMENT
- *----------------------------------------------------------------------*/
-#ifdef	CONFIG_DNPEVA2			/* DNP/EVA2 base board */
-#define	CONFIG_SYS_ADNPESC1_SLED_YELLO_ON	"sled yellow on; "
-#define	CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF	"sled yellow off; "
-#else
-#define	CONFIG_SYS_ADNPESC1_SLED_YELLO_ON
-#define	CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF
-#endif
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"update_allowed=0\0"						\
-	"update_load_addr="	CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR	"\0"	\
-	"appl_entry_addr="	CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY	"\0"	\
-	"appl_end_addr="	CONFIG_SYS_ADNPESC1_NIOS_APPL_END	"\0"	\
-	"appl_ident_addr="	CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT	"\0"	\
-	"appl_ident_str="	CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER	"\0"	\
-	"appl_name=ADNPESC1/base32/linux.bin\0"				\
-	"appl_update="							\
-		"if itest.b $update_allowed != 0; "			\
-		"then "							\
-			CONFIG_SYS_ADNPESC1_SLED_YELLO_ON			\
-			"tftp $update_load_addr $appl_name; "		\
-			"protect off $appl_entry_addr $appl_end_addr; "	\
-			"era $appl_entry_addr $appl_end_addr; "		\
-			"cp.b $update_load_addr $appl_entry_addr $filesize; "\
-			CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF			\
-		"else "							\
-			"echo *** update not allowed (update_allowed=$update_allowed); "\
-		"fi\0"							\
-	"fs_base_addr="		CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE	"\0"	\
-	"fs_end_addr="		CONFIG_SYS_ADNPESC1_FILESYSTEM_END	"\0"	\
-	"fs_name=ADNPESC1/base32/romfs.img\0"				\
-	"fs_update="							\
-		"if itest.b $update_allowed != 0; "			\
-		"then "							\
-			CONFIG_SYS_ADNPESC1_SLED_YELLO_ON			\
-			"tftp $update_load_addr $fs_name; "		\
-			"protect off $fs_base_addr $fs_end_addr; "	\
-			"era $fs_base_addr $fs_end_addr; "		\
-			"cp.b $update_load_addr $fs_base_addr $filesize; "\
-			CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF			\
-		"else "							\
-			"echo *** update not allowed (update_allowed=$update_allowed); "\
-		"fi\0"							\
-	"uboot_name=ADNPESC1/base32/u-boot.bin\0"			\
-	"uboot_loadnrun="						\
-		"if ping $serverip; "					\
-		"then "							\
-			CONFIG_SYS_ADNPESC1_SLED_YELLO_ON			\
-			"tftp $update_load_addr $uboot_name; "		\
-			"wd off; "					\
-			"go $update_load_addr; "			\
-		"else "							\
-			"echo *** missing connection to $serverip; "	\
-			"echo *** check your network and try again...; "\
-		"fi\0"
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-
-#if	(CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD	1		   /* Baudrate is fixed	*/
-#define CONFIG_BAUDRATE		CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef	CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE		115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER)
-
-#if	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif	/* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * WATCHDOG (or better MAX823 supervisory circuite access)
- *----------------------------------------------------------------------*/
-#define	CONFIG_HW_WATCHDOG	1		/* board specific WD	*/
-
-#ifdef	CONFIG_HW_WATCHDOG
-
-/* MAX823 supervisor -- watchdog enable port at: */
-#if	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 0)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO0	/* PIO0		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 1)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO1	/* PIO1		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 2)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO2	/* PIO2		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 3)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO3	/* PIO3		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 4)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO4	/* PIO4		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 5)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO5	/* PIO5		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 6)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO6	/* PIO6		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 7)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO7	/* PIO7		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 8)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO8	/* PIO8		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDENA_PIO == 9)
-#define	CONFIG_HW_WDENA_BASE	CONFIG_SYS_NIOS_CPU_PIO9	/* PIO9		*/
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one WDENA_PIO in NIOS CPU config
-#endif
-
-/* MAX823 supervisor -- watchdog trigger port at: */
-#if	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 0)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO0	/* PIO0		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 1)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO1	/* PIO1		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 2)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO2	/* PIO2		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 3)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO3	/* PIO3		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 4)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO4	/* PIO4		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 5)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO5	/* PIO5		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 6)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO6	/* PIO6		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 7)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO7	/* PIO7		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 8)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO8	/* PIO8		*/
-#elif	(CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 9)
-#define	CONFIG_HW_WDTOG_BASE	CONFIG_SYS_NIOS_CPU_PIO9	/* PIO9		*/
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one WDTOG_PIO in NIOS CPU config
-#endif
-
-#if	defined(CONFIG_NIOS_BASE_32)		/* NIOS CPU specifics	*/
-#define	CONFIG_HW_WDENA_BIT		0	/* WD enable  @ Bit 0	*/
-#define	CONFIG_HW_WDTOG_BIT		0	/* WD trigger @ Bit 0	*/
-#define	CONFIG_HW_WDPORT_WRONLY	1	/* each WD port wr/only*/
-#else
-#error *** CONFIG_SYS_ERROR: missing watchdog bit configuration, expand your config.h
-#endif
-
-#endif	/* CONFIG_HW_WATCHDOG */
-
-/*------------------------------------------------------------------------
- * SERIAL PERIPHAREL INTERFACE
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
-
-#define	CONFIG_NIOS_SPI		1		/* SPI support active	*/
-#define	CONFIG_SYS_NIOS_SPIBASE	CONFIG_SYS_NIOS_CPU_SPI0
-#define	CONFIG_SYS_NIOS_SPIBITS	CONFIG_SYS_NIOS_CPU_SPI0_BITS
-
-#define	CONFIG_RTC_DS1306	1	/* Dallas 1306 real time clock	*/
-#define CONFIG_SYS_SPI_RTC_DEVID	0	/*        as 1st SPI device	*/
-
-#else
-#undef	CONFIG_NIOS_SPI				/* NO SPI support	*/
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet -- needs work!
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0)		/* LAN91C111		*/
-
-#define	CONFIG_DRIVER_SMC91111			/* Using SMC91c111	*/
-#undef	CONFIG_SMC91111_EXT_PHY			/* Internal PHY		*/
-#define	CONFIG_SMC91111_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define	CONFIG_SMC_USE_32_BIT	1
-#else	/* no */
-#undef	CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1)		/* CS8900A		*/
-
-	/********************************************/
-	/* !!! CS8900 is __not__ tested on NIOS !!! */
-	/********************************************/
-#define CONFIG_NET_MULTI
-#define	CONFIG_CS8900		/* Using CS8900		*/
-#define	CONFIG_CS8900_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
-				CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef	CONFIG_CS8900_BUS16
-#define	CONFIG_CS8900_BUS32
-#else	/* no */
-#define	CONFIG_CS8900_BUS16
-#undef	CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR		02:80:ae:20:60:6f
-#define CONFIG_NETMASK		255.255.255.248
-#define CONFIG_IPADDR		192.168.161.84
-#define CONFIG_SERVERIP		192.168.161.85
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO)
-
-#if	(CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#define	STATUS_LED_BASE			CONFIG_SYS_NIOS_CPU_PIO0
-#define	STATUS_LED_BITS			CONFIG_SYS_NIOS_CPU_PIO0_BITS
-#define	STATUS_LED_ACTIVE		1 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO0_TYPE == 1)
-#define	STATUS_LED_WRONLY		1
-#else
-#undef	STATUS_LED_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#define	STATUS_LED_BASE			CONFIG_SYS_NIOS_CPU_PIO1
-#define	STATUS_LED_BITS			CONFIG_SYS_NIOS_CPU_PIO1_BITS
-#define	STATUS_LED_ACTIVE		1 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO1_TYPE == 1)
-#define	STATUS_LED_WRONLY		1
-#else
-#undef	STATUS_LED_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define	STATUS_LED_BASE			CONFIG_SYS_NIOS_CPU_PIO2
-#define	STATUS_LED_BITS			CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define	STATUS_LED_ACTIVE		1 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define	STATUS_LED_WRONLY		1
-#else
-#undef	STATUS_LED_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define	CONFIG_STATUS_LED		1 /* enable status led driver */
-
-#define	STATUS_LED_BIT			(1 << 0)	/* LED[0] */
-#define	STATUS_LED_STATE		STATUS_LED_BLINKING
-#define	STATUS_LED_BOOT_STATE		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)	/* ca. 1 Hz */
-#define	STATUS_LED_BOOT			0		/* boot LED */
-
-#if	(STATUS_LED_BITS > 1)
-#define	STATUS_LED_BIT1			(1 << 1)	/* LED[1] */
-#define	STATUS_LED_STATE1		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 10)	/* ca. 5 Hz */
-#define	STATUS_LED_RED			1		/* fail LED */
-#endif
-
-#if	(STATUS_LED_BITS > 2)
-#define	STATUS_LED_BIT2			(1 << 2)	/* LED[2] */
-#define	STATUS_LED_STATE2		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD2		(CONFIG_SYS_HZ / 2)	/* ca. 1 Hz */
-#define	STATUS_LED_YELLOW		2		/* info LED */
-#endif
-
-#if	(STATUS_LED_BITS > 3)
-#define	STATUS_LED_BIT3			(1 << 3)	/* LED[3] */
-#define	STATUS_LED_STATE3		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD3		(CONFIG_SYS_HZ / 2)	/* ca. 1 Hz */
-#define	STATUS_LED_GREEN		3		/* info LED */
-#endif
-
-#define	STATUS_LED_PAR			1 /* makes status_led.h happy */
-
-#endif	/* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * Diagnostics / Power On Self Tests
- *----------------------------------------------------------------------*/
-#define	CONFIG_POST			CONFIG_SYS_POST_RTC
-#define	CONFIG_SYS_NIOS_POST_WORD_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1)
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_SPI
-#endif
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define	CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define	CONFIG_SYS_HUSH_PARSER		1	    /* use "hush" command parser
-					       undef to save memory	*/
-#define	CONFIG_SYS_PROMPT		"ADNPESC1 > " /* Monitor Command Prompt	*/
-#define	CONFIG_SYS_CBSIZE		1024	    /* Console I/O Buffer Size	*/
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		64	    /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
-
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"[]> "
-#endif
-
-/* Default load address	*/
-#if	(CONFIG_SYS_SRAM_SIZE != 0)
-
-/* default in SRAM */
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SRAM_BASE
-
-#elif	(CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* default in SDRAM */
-#if	(CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#if 1
-#define	CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define	CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x400000)
-#endif
-#else
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
-#endif
-
-#else
-#undef	CONFIG_SYS_LOAD_ADDR		/* force error break */
-#endif
-
-/* MEM test area */
-#if	(CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* SDRAM begin to stack area (1MB stack) */
-#if	(CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#if 0
-#define	CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define	CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x400000)
-#endif
-#else
-#define	CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#endif
-
-#define	CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - (1024 * 1024))
-#define	CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - (1024 * 1024))
-
-#else
-#undef	CONFIG_SYS_MEMTEST_START	/* force error break */
-#undef	CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor"
-#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		""
-#define MTDPARTS_DEFAULT	""
-*/
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/ADNPESC1_base_32.h b/include/configs/ADNPESC1_base_32.h
deleted file mode 100644
index 1fe8d09..0000000
--- a/include/configs/ADNPESC1_base_32.h
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_ADNPESC1_BASE_32_H
-#define __CONFIG_ADNPESC1_BASE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/ADNPESC1.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be undefined or defined with zero, example CPU without data cache / OCI:
- *
- *	#define	CONFIG_SYS_NIOS_CPU_ICACHE	4096
- *	#define	CONFIG_SYS_NIOS_CPU_DCACHE	0
- *	#undef	CONFIG_SYS_NIOS_CPU_OCI_BASE
- *	#undef	CONFIG_SYS_NIOS_CPU_OCI_SIZE
- */
-
-/* CPU core */
-#define	CONFIG_SYS_NIOS_CPU_CLK	50000000	/* NIOS CPU clock	*/
-#define	CONFIG_SYS_NIOS_CPU_ICACHE	(0)		/* instruction cache	*/
-#define	CONFIG_SYS_NIOS_CPU_DCACHE	(0)		/* data cache		*/
-#define	CONFIG_SYS_NIOS_CPU_REG_NUMS	512		/* number of register	*/
-#define	CONFIG_SYS_NIOS_CPU_MUL	0		/* 16x16 MUL:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_MSTEP	1		/* 16x16 MSTEP:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_STACK	0x03000000	/* stack top	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_BASE	0x02000000	/* IRQ vectors	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_SIZE	256		/*		size	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_NUMS	64		/*		numbers	*/
-#define	CONFIG_SYS_NIOS_CPU_RST_VECT	0x00000000	/* RESET vector	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_DBG_CORE	0		/* CPU debug:	no(0)	*/
-						/*		yes(1)	*/
-
-/* The offset address in flash to check for the Nios signature "Ni".
- * (see GM_FlashExec in germs_monitor.s) */
-#define	CONFIG_SYS_NIOS_CPU_EXES_OFFS	0x0C
-
-/* on-chip extensions */
-#undef	CONFIG_SYS_NIOS_CPU_RAM_BASE			/* on chip RAM	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_RAM_SIZE			/* 64 KB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_ROM_BASE	0x00000000	/* on chip ROM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_ROM_SIZE	(2 * 1024)	/*  2 KB	size	*/
-
-#undef	CONFIG_SYS_NIOS_CPU_OCI_BASE			/* OCI core	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_OCI_SIZE			/*		size	*/
-
-/* timer */
-#define	CONFIG_SYS_NIOS_CPU_TIMER_NUMS	1		/* number of timer	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER0	0x00000840	/* TIMER0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_IRQ	16		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_PER	1000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_AR	0		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_FP	0		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_SS	1		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-/* serial i/o */
-#define	CONFIG_SYS_NIOS_CPU_UART_NUMS	2		/* number of uarts	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART0	0x00000800	/* UART0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_IRQ	17		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_SB	1		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_HS	1		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART1	0x00000820	/* UART1	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_IRQ	18		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_SB	1		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_HS	0		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-/* serial peripheral i/o */
-#define	CONFIG_SYS_NIOS_CPU_SPI_NUMS	1		/* number of spis	*/
-
-#define	CONFIG_SYS_NIOS_CPU_SPI0	0x000008c0	/* SPI0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_IRQ	25		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_BITS	16		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_MA	1		/*  is master:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_SLN	1		/*  num slaves		*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_TCLK	250000		/*  clock (Hz)		*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_TDELAY 2		/*  delay (usec)	*/
-#define	CONFIG_SYS_NIOS_CPU_SPI0_FB	0		/*  first bit	msb(0)	*/
-						/*		lsb(1)	*/
-
-/* parallel i/o */
-#define	CONFIG_SYS_NIOS_CPU_PIO_NUMS	14		/* number of parports	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO0	0x00000860	/* PIO0		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO0_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_BITS	8		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO1	0x00000870	/* PIO1		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO1_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_BITS	8		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO2	0x00000880	/* PIO2		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO2_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_BITS	4		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO3	0x00000890	/* PIO3		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO3_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO3	0x00000890	/* PIO3		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO3_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO4	0x000008a0	/* PIO4		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO4_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO5	0x000008b0	/* PIO5		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO5_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO6	0x00000900	/* PIO6		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_IRQ	20		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_ITYPE	1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO7	0x00000910	/* PIO7		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_IRQ	31		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_ITYPE	1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO8	0x00000920	/* PIO8		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_IRQ	32		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO8_ITYPE	1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO9	0x00000930	/* PIO9		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_IRQ	33		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO9_ITYPE	1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO10	0x00000940	/* PIO10	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_IRQ	34		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO10_ITYPE 1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO11	0x00000950	/* PIO11	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_IRQ	35		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO11_ITYPE 1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO12	0x00000960	/* PIO12	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_IRQ	36		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO12_ITYPE 1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO13	0x00000970	/* PIO113	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_IRQ	37		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_EDGE	2		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO13_ITYPE 1		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-/* IDE i/f */
-#define	CONFIG_SYS_NIOS_CPU_IDE_NUMS	2		/* number of IDE contr.	*/
-
-#define	CONFIG_SYS_NIOS_CPU_IDE0	0x00001000	/* IDE0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE0_IRQ	36		/*		IRQ	*/
-
-#define	CONFIG_SYS_NIOS_CPU_IDE1	0x00001020	/* IDE1		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE1_IRQ	37		/*		IRQ	*/
-
-/* memory accessibility */
-#undef	CONFIG_SYS_NIOS_CPU_SRAM_BASE			/* board SRAM	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_SRAM_SIZE			/*  1 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_BASE	0x02000000	/* board SDRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_SIZE	(16*1024*1024)	/* 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_FLASH_BASE	0x01000000	/* board Flash	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_FLASH_SIZE	(8*1024*1024)	/*  8 MB	size	*/
-
-/* LAN */
-#define	CONFIG_SYS_NIOS_CPU_LAN_NUMS	1		/* number of LAN i/f	*/
-
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BASE	0x00010000	/* LAN0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_OFFS	(0)		/*		offset	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_IRQ	20		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BUSW	16		/*	        buswidth*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_TYPE	0		/*	smc91111(0)	*/
-						/*	cs8900(1)	*/
-						/* ex:	openmac(2)	*/
-						/* ex:	alteramac(3)	*/
-
-/* external extension */
-#define	CONFIG_SYS_NIOS_CPU_CS0_BASE	0x40000000	/* board EXT0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_CS0_SIZE	(16*1024*1024)	/*  max. 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_CS1_BASE	0x41000000	/* board EXT1	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_CS1_SIZE	(16*1024*1024)	/*  max. 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_CS2_BASE	0x42000000	/* board EXT2	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_CS2_SIZE	(16*1024*1024)	/*  max. 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_CS3_BASE	0x43000000	/* board EXT3	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_CS3_SIZE	(16*1024*1024)	/*  max. 16 MB	size	*/
-
-/* symbolic redefinition (undef, if not present) */
-#define	CONFIG_SYS_NIOS_CPU_TICK_TIMER		0	/* TIMER0: tick (needed)*/
-#undef	CONFIG_SYS_NIOS_CPU_USER_TIMER			/* TIMERx: users choice	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PORTA_PIO		0	/* PIO0: Port A		*/
-#define	CONFIG_SYS_NIOS_CPU_PORTB_PIO		1	/* PIO1: Port D		*/
-#define	CONFIG_SYS_NIOS_CPU_PORTC_PIO		2	/* PIO2: Port C		*/
-#define	CONFIG_SYS_NIOS_CPU_RCM_PIO		3	/* PIO3: RCM jumper	*/
-#define	CONFIG_SYS_NIOS_CPU_WDENA_PIO		4	/* PIO4: watchdog enable*/
-#define	CONFIG_SYS_NIOS_CPU_WDTOG_PIO		5	/* PIO5: watchdog trigg.*/
-
-/* PIOx: LED bar */
-#ifdef	CONFIG_DNPEVA2			/* DNP/EVA2 base board */
-#define	CONFIG_SYS_NIOS_CPU_LED_PIO		CONFIG_SYS_NIOS_CPU_PORTA_PIO
-#else
-#undef	CONFIG_SYS_NIOS_CPU_LED_PIO			/* no LED bar		*/
-#endif
-
-#endif	/* __CONFIG_ADNPESC1_BASE_32_H */
diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h
deleted file mode 100644
index cdc488b..0000000
--- a/include/configs/DK1C20.h
+++ /dev/null
@@ -1,555 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- * Stephan Linz <linz@li-pro.net>
- *
- * CompactFlash/IDE:
- * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if	defined(CONFIG_NIOS_SAFE_32)
-#include <configs/DK1C20_safe_32.h>
-#elif	defined(CONFIG_NIOS_STANDARD_32)
-#include <configs/DK1C20_standard_32.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS		1		/* NIOS-32 core		*/
-#define	CONFIG_DK1C20		1		/* Cyclone DK-1C20 board*/
-#define CONFIG_SYS_CLK_FREQ	CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock	*/
-#define	CONFIG_SYS_HZ			1000		/* 1 msec time tick	*/
-#define	CONFIG_BOARD_EARLY_INIT_F 1	/* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE		CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#define CONFIG_SYS_SRAM_BASE		CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define CONFIG_SYS_SRAM_SIZE		CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-#define CONFIG_SYS_VECT_BASE		CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately).
- *
- *	-The heap is placed below the monitor.
- *	-Global data is placed below the heap.
- *	-The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256k		*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE		CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT	128		/* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1		/* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	8000		/* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	100		/* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE	unsigned char	/* flash word size	*/
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define	CONFIG_ENV_IS_IN_FLASH	1		/* Environment in flash */
-#define CONFIG_ENV_ADDR		CONFIG_SYS_FLASH_BASE	/* Mem addr of env	*/
-#define CONFIG_ENV_SIZE		(64 * 1024)	/* 64 KByte (1 sector)	*/
-#define CONFIG_ENV_OVERWRITE			/* Serial/eth change Ok */
-
-#else
-#define	CONFIG_ENV_IS_NOWHERE	1		/* NO Environment	*/
-#endif
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-
-#if	(CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD	1		   /* Baudrate is fixed	*/
-#define CONFIG_BAUDRATE		CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef	CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE		115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0)
-
-#if	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif	/* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0)		/* LAN91C111		*/
-
-#define	CONFIG_DRIVER_SMC91111			/* Using SMC91c111	*/
-#undef	CONFIG_SMC91111_EXT_PHY			/* Internal PHY		*/
-#define	CONFIG_SMC91111_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define	CONFIG_SMC_USE_32_BIT	1
-#else	/* no */
-#undef	CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1)		/* CS8900A		*/
-
-	/********************************************/
-	/* !!! CS8900 is __not__ tested on NIOS !!! */
-	/********************************************/
-#define CONFIG_NET_MULTI
-#define	CONFIG_CS8900		/* Using CS8900		*/
-#define	CONFIG_CS8900_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
-				CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef	CONFIG_CS8900_BUS16
-#define	CONFIG_CS8900_BUS32
-#else	/* no */
-#define	CONFIG_CS8900_BUS16
-#undef	CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR		08:00:3e:26:0a:5b
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_IPADDR		192.168.2.21
-#define CONFIG_SERVERIP		192.168.2.16
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
-
-#if	(CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define	STATUS_LED_BASE			CONFIG_SYS_NIOS_CPU_PIO2
-#define	STATUS_LED_BITS			CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define	STATUS_LED_ACTIVE		1 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define	STATUS_LED_WRONLY		1
-#else
-#undef	STATUS_LED_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define	CONFIG_STATUS_LED		1 /* enable status led driver */
-
-#define	STATUS_LED_BIT			(1 << 0)	/* LED[0] */
-#define	STATUS_LED_STATE		STATUS_LED_BLINKING
-#define	STATUS_LED_BOOT_STATE		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_BOOT			0		/* boot LED */
-
-#if	(STATUS_LED_BITS > 1)
-#define	STATUS_LED_BIT1			(1 << 1)	/* LED[1] */
-#define	STATUS_LED_STATE1		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 50)	/* ca. 5 Hz */
-#define	STATUS_LED_RED			1		/* fail LED */
-#endif
-
-#if	(STATUS_LED_BITS > 2)
-#define	STATUS_LED_BIT2			(1 << 2)	/* LED[2] */
-#define	STATUS_LED_STATE2		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD2		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_YELLOW		2		/* info LED */
-#endif
-
-#if	(STATUS_LED_BITS > 3)
-#define	STATUS_LED_BIT3			(1 << 3)	/* LED[3] */
-#define	STATUS_LED_STATE3		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD3		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_GREEN		3		/* info LED */
-#endif
-
-#define	STATUS_LED_PAR			1 /* makes status_led.h happy */
-
-#endif	/* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * SEVEN SEGMENT LED DISPLAY
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0)
-
-#if	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
-
-#define	SEVENSEG_BASE			CONFIG_SYS_NIOS_CPU_PIO3
-#define	SEVENSEG_BITS			CONFIG_SYS_NIOS_CPU_PIO3_BITS
-#define	SEVENSEG_ACTIVE			0 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
-#define	SEVENSEG_WRONLY			1
-#else
-#undef	SEVENSEG_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
-#endif
-
-#define	CONFIG_SEVENSEG			1 /* enable seven segment led driver */
-
-/*
- * Dual 7-Segment Display pin assignment -- read more in your
- * "Nios Development Board Reference Manual"
- *
- *
- *    (U8) HI:D[15..8]     (U9) LO:D[7..0]
- *         ______               ______
- *        |  D14 |             |  D6  |
- *        |      |             |      |
- *      D9|      |D13        D1|      |D5
- *        |______|             |______|                  ___
- *        |  D8  |             |  D0  |                 | A |
- *        |      |             |      |                F|___|B
- *     D10|      |D12        D2|      |D4               | G |
- *        |______|             |______|                E|___|C
- *           D11  *               D3   *                  D  *
- *                D15                  D7                    DP
- *
- */
-#define	SEVENSEG_DIGIT_HI_LO_EQUAL	1	/* high nibble equal low nibble */
-#define	SEVENSEG_DIGIT_A		(1 << 6) /* bit 6 is segment A */
-#define	SEVENSEG_DIGIT_B		(1 << 5) /* bit 5 is segment B */
-#define	SEVENSEG_DIGIT_C		(1 << 4) /* bit 4 is segment C */
-#define	SEVENSEG_DIGIT_D		(1 << 3) /* bit 3 is segment D */
-#define	SEVENSEG_DIGIT_E		(1 << 2) /* bit 2 is segment E */
-#define	SEVENSEG_DIGIT_F		(1 << 1) /* bit 1 is segment F */
-#define	SEVENSEG_DIGIT_G		(1 << 0) /* bit 0 is segment G */
-#define	SEVENSEG_DIGIT_DP		(1 << 7) /* bit 7 is decimal point */
-
-#endif	/* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * ASMI - Active Serial Memory Interface.
- *
- * ASMI is for Cyclone devices only and only works when the configuration
- * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS_ASMI			   /* Enable ASMI	*/
-#define CONFIG_SYS_NIOS_ASMIBASE	CONFIG_SYS_NIOS_CPU_ASMI0 /* ASMI base address	*/
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-/*------------------------------------------------------------------------
- * COMPACT FLASH
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_IDE)
-#define CONFIG_IDE_PREINIT			/* Implement id_preinit	*/
-#define CONFIG_SYS_IDE_MAXBUS		1		/* 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	1		/* 1 drive per IDE bus	*/
-
-#define CONFIG_SYS_ATA_BASE_ADDR	0x00920a00	/* IDE/ATA base addr	*/
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000		/* IDE0 offset		*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	0x0040		/* Data IO offset	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	0x0040		/* Register offset	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	0x0100		/* Alternate reg offset	*/
-#define CONFIG_SYS_ATA_STRIDE          4		/* Width betwix addrs	*/
-#define CONFIG_DOS_PARTITION
-
-/* Board-specific cf regs */
-#define CONFIG_SYS_CF_PRESENT		0x009209b0	/* CF Present PIO base	*/
-#define CONFIG_SYS_CF_POWER		0x009209c0	/* CF Power FET PIO base*/
-#define CONFIG_SYS_CF_ATASEL		0x009209d0	/* CF ATASEL PIO base	*/
-
-#endif
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define	CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define	CONFIG_SYS_PROMPT		"DK1C20 > " /* Monitor Command Prompt	*/
-#define	CONFIG_SYS_CBSIZE		256	    /* Console I/O Buffer Size	*/
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16	    /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
-
-#if	(CONFIG_SYS_SRAM_SIZE != 0)
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SRAM_BASE	/* Default load address	*/
-#else
-#undef	CONFIG_SYS_LOAD_ADDR
-#endif
-
-#if	(CONFIG_SYS_SDRAM_SIZE != 0)
-#define	CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE	/* SDRAM til stack area */
-#define	CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - (1024 * 1024)) /* 1MB stack */
-#else
-#undef	CONFIG_SYS_MEMTEST_START
-#undef	CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor0"
-#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		""
-#define MTDPARTS_DEFAULT	""
-*/
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/DK1C20_safe_32.h b/include/configs/DK1C20_safe_32.h
deleted file mode 100644
index 86e4869..0000000
--- a/include/configs/DK1C20_safe_32.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1C20_SAFE_32_H
-#define __CONFIG_DK1C20_SAFE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1C20.h)
- *
- * !!! TODO !!! TODO !!!
- */
-#error *** CONFIG_SYS_ERROR: DK1C20_safe_32 have to be defined (use DK1C20_standard_32 as template)
-
-#endif	/* __CONFIG_DK1C20_SAFE_32_H */
diff --git a/include/configs/DK1C20_standard_32.h b/include/configs/DK1C20_standard_32.h
deleted file mode 100644
index c08aaae..0000000
--- a/include/configs/DK1C20_standard_32.h
+++ /dev/null
@@ -1,279 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1C20_STANDARD_32_H
-#define __CONFIG_DK1C20_STANDARD_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1C20.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- *	#define	CONFIG_SYS_NIOS_CPU_ICACHE	4096
- *	#define	CONFIG_SYS_NIOS_CPU_DCACHE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_BASE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_SIZE	0
- */
-
-/* CPU core */
-#define	CONFIG_SYS_NIOS_CPU_CLK	50000000	/* NIOS CPU clock	*/
-#define	CONFIG_SYS_NIOS_CPU_ICACHE	(4 * 1024)	/* instruction cache	*/
-#define	CONFIG_SYS_NIOS_CPU_DCACHE	(4 * 1024)	/* data cache		*/
-#define	CONFIG_SYS_NIOS_CPU_REG_NUMS	256		/* number of register	*/
-#define	CONFIG_SYS_NIOS_CPU_MUL	0		/* 16x16 MUL:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_MSTEP	1		/* 16x16 MSTEP:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_STACK	0x008fff00	/* stack top	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_BASE	0x008fff00	/* IRQ vectors	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_SIZE	256		/*		size	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_NUMS	64		/*		numbers	*/
-#define	CONFIG_SYS_NIOS_CPU_RST_VECT	0x00920000	/* RESET vector	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_DBG_CORE	0		/* CPU debug:	no(0)	*/
-						/*		yes(1)	*/
-
-/* on-chip extensions */
-#define	CONFIG_SYS_NIOS_CPU_RAM_BASE	0		/* on chip RAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_RAM_SIZE	0		/*		size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_ROM_BASE	0x00920000	/* on chip ROM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_ROM_SIZE	(2 * 1024)	/*  2 KB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_OCI_BASE	0x00920800	/* OCI core	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_OCI_SIZE	256		/*		size	*/
-
-/* timer */
-#define	CONFIG_SYS_NIOS_CPU_TIMER_NUMS	2		/* number of timer	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER0	0x00920940	/* TIMER0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_IRQ	16		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_PER	1000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_AR	0		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_FP	0		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_SS	1		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER1	0x009209e0	/* TIMER1	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_IRQ	50		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_PER	10000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_AR	1		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_FP	1		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_SS	0		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-/* serial i/o */
-#define	CONFIG_SYS_NIOS_CPU_UART_NUMS	1		/* number of uarts	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART0	0x00920900	/* UART0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_IRQ	25		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_SB	1		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_HS	0		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-/* parallel i/o */
-#define	CONFIG_SYS_NIOS_CPU_PIO_NUMS	8		/* number of parports	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO0	0x00920960	/* PIO0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_IRQ	40		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_BITS	4		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_EDGE	3		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_ITYPE	2		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO1	0x00920970	/* PIO1		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO1_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_BITS	11		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO2	0x00920980	/* PIO2		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO2_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_BITS	8		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO3	0x00920990	/* PIO3		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO3_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_BITS	16		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO4	0x009209a0	/* PIO4		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO4_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO5	0x009209b0	/* PIO5		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_IRQ	35		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_EDGE	3		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_ITYPE	2		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO6	0x009209c0	/* PIO6		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO6_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO7	0x009209d0	/* PIO7		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO7_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-/* IDE i/f */
-#define	CONFIG_SYS_NIOS_CPU_IDE_NUMS	1		/* number of IDE contr.	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE0	0x00920a00	/* IDE0		addr	*/
-
-/* active serial memory i/f */
-#define	CONFIG_SYS_NIOS_CPU_ASMI_NUMS	1		/* number of ASMI	*/
-#define	CONFIG_SYS_NIOS_CPU_ASMI0	0x00920b00	/* ASMI0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_ASMI0_IRQ	45		/*		IRQ	*/
-
-/* memory accessibility */
-#define	CONFIG_SYS_NIOS_CPU_SRAM_BASE	0x00800000	/* board SRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SRAM_SIZE	(1024 * 1024)	/*  1 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_BASE	0x01000000	/* board SDRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_SIZE	(16*1024*1024)	/* 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_FLASH_BASE	0x00000000	/* board Flash	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_FLASH_SIZE	(8*1024*1024)	/*  8 MB	size	*/
-
-/* LAN */
-#define	CONFIG_SYS_NIOS_CPU_LAN_NUMS	1		/* number of LAN i/f	*/
-
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BASE	0x00910000	/* LAN0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_OFFS	0x0300		/*		offset	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_IRQ	30		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BUSW	32		/*	        buswidth*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_TYPE	0		/*	smc91111(0)	*/
-						/*	cs8900(1)	*/
-						/* ex:	alteramac(2)	*/
-
-/* symbolic redefinition (undef, if not present) */
-#define	CONFIG_SYS_NIOS_CPU_USER_TIMER		0	/* TIMER0: users choice	*/
-#define	CONFIG_SYS_NIOS_CPU_TICK_TIMER		1	/* TIMER1: tick (needed)*/
-
-#define	CONFIG_SYS_NIOS_CPU_BUTTON_PIO		0	/* PIO0: buttons	*/
-#define	CONFIG_SYS_NIOS_CPU_LCD_PIO		1	/* PIO1: ASCII LCD	*/
-#define	CONFIG_SYS_NIOS_CPU_LED_PIO		2	/* PIO2: LED bar	*/
-#define	CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO	3	/* PIO3: 7-seg. display	*/
-#define	CONFIG_SYS_NIOS_CPU_RECONF_PIO		4	/* PIO4: reconf pin	*/
-#define	CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO	5	/* PIO5: CF present IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_CFPOWER_PIO	6	/* PIO6: CF power/sw.	*/
-#define	CONFIG_SYS_NIOS_CPU_CFATASEL_PIO	7	/* PIO7: CF ATA select	*/
-
-#endif	/* __CONFIG_DK1C20_STANDARD_32_H */
diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h
deleted file mode 100644
index 6e78861..0000000
--- a/include/configs/DK1S10.h
+++ /dev/null
@@ -1,561 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/***********************************************************************
- * Include the whole NIOS CPU configuration.
- *
- * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
- *
- ***********************************************************************/
-
-#if	defined(CONFIG_NIOS_SAFE_32)
-#include <configs/DK1S10_safe_32.h>
-#elif	defined(CONFIG_NIOS_STANDARD_32)
-#include <configs/DK1S10_standard_32.h>
-#elif	defined(CONFIG_NIOS_MTX_LDK_20)
-#include <configs/DK1S10_mtx_ldk_20.h>
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration
-#endif
-
-/*------------------------------------------------------------------------
- * BOARD/CPU -- TOP-LEVEL
- *----------------------------------------------------------------------*/
-#define CONFIG_NIOS		1		/* NIOS-32 core		*/
-#define	CONFIG_DK1S10		1		/* Stratix DK-1S10 board*/
-#define CONFIG_SYS_CLK_FREQ	CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock	*/
-#define	CONFIG_SYS_HZ			1000		/* 1 msec time tick	*/
-#define	CONFIG_BOARD_EARLY_INIT_F 1	/* enable early board-spec. init*/
-
-/*------------------------------------------------------------------------
- * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0)
-
-#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_NIOS_CPU_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE		CONFIG_SYS_NIOS_CPU_SDRAM_SIZE
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config
-#endif
-
-#if	defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE)
-
-#define	CONFIG_SYS_SRAM_BASE		CONFIG_SYS_NIOS_CPU_SRAM_BASE
-#define	CONFIG_SYS_SRAM_SIZE		CONFIG_SYS_NIOS_CPU_SRAM_SIZE
-
-#else
-
-#undef	CONFIG_SYS_SRAM_BASE
-#undef	CONFIG_SYS_SRAM_SIZE
-
-#endif
-
-#define CONFIG_SYS_VECT_BASE		CONFIG_SYS_NIOS_CPU_VEC_BASE
-
-/*------------------------------------------------------------------------
- * MEMORY ORGANIZATION - For the most part, you can put things pretty
- * much anywhere. This is pretty flexible for Nios. So here we make some
- * arbitrary choices & assume that the monitor is placed at the end of
- * a memory resource (so you must make sure TEXT_BASE is chosen
- * appropriately).
- *
- *	-The heap is placed below the monitor.
- *	-Global data is placed below the heap.
- *	-The stack is placed below global data (&grows down).
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256k		*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Global data size rsvd*/
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
-
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
-
-/*------------------------------------------------------------------------
- * FLASH (AM29LV065D)
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_NIOS_CPU_FLASH_BASE
-#define CONFIG_SYS_FLASH_SIZE		CONFIG_SYS_NIOS_CPU_FLASH_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT	128		/* Max # sects per bank */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1		/* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	8000		/* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	100		/* Write timeout (msec) */
-#define CONFIG_SYS_FLASH_WORD_SIZE	unsigned char	/* flash word size	*/
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * ENVIRONMENT
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0)
-
-#define	CONFIG_ENV_IS_IN_FLASH	1		/* Environment in flash */
-
-#if	defined(CONFIG_NIOS_STANDARD_32)
-#define CONFIG_ENV_ADDR		CONFIG_SYS_FLASH_BASE	/* Mem addr of env	*/
-#elif	defined(CONFIG_NIOS_MTX_LDK_20)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR
-#endif
-
-#define CONFIG_ENV_SIZE		(64 * 1024)	/* 64 KByte (1 sector)	*/
-#define CONFIG_ENV_OVERWRITE			/* Serial/eth change Ok */
-
-#else
-#define	CONFIG_ENV_IS_NOWHERE	1		/* NO Environment	*/
-#endif
-
-/*------------------------------------------------------------------------
- * CONSOLE
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_UART_NUMS != 0)
-
-#define CONFIG_SYS_NIOS_CONSOLE	CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */
-#define CONFIG_LOADS_ECHO	1	 /* echo on for serial download */
-
-#if	(CONFIG_SYS_NIOS_CPU_UART0_BR != 0)
-#define CONFIG_SYS_NIOS_FIXEDBAUD	1		   /* Baudrate is fixed	*/
-#define CONFIG_BAUDRATE		CONFIG_SYS_NIOS_CPU_UART0_BR
-#else
-#undef	CONFIG_SYS_NIOS_FIXEDBAUD
-#define CONFIG_BAUDRATE		115200
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
- * so an avalon bus timer is required.
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER)
-
-#if	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER0_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1)
-
-#define CONFIG_SYS_NIOS_TMRBASE	CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		CONFIG_SYS_NIOS_CPU_TIMER1_IRQ
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1)		    /* fixed period */
-
-#if	(CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ)
-#define CONFIG_SYS_NIOS_TMRMS		(CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ
-#endif
-
-#undef	CONFIG_SYS_NIOS_TMRCNT	/* no preloadable counter value */
-
-#elif	(CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0)		    /* variable period */
-
-#if	(CONFIG_SYS_HZ <= 1000)
-#define CONFIG_SYS_NIOS_TMRMS		(1000 / CONFIG_SYS_HZ)
-#else
-#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000
-#endif
-
-#define	CONFIG_SYS_NIOS_TMRCNT		(CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ)
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct
-#endif
-
-#endif	/* CONFIG_SYS_NIOS_CPU_TICK_TIMER */
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config
-#endif
-
-/*------------------------------------------------------------------------
- * Ethernet -- needs work!
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0)		/* LAN91C111		*/
-
-#define	CONFIG_DRIVER_SMC91111			/* Using SMC91c111	*/
-#undef	CONFIG_SMC91111_EXT_PHY			/* Internal PHY		*/
-#define	CONFIG_SMC91111_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#define	CONFIG_SMC_USE_32_BIT	1
-#else	/* no */
-#undef	CONFIG_SMC_USE_32_BIT
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1)		/* CS8900A		*/
-
-	/********************************************/
-	/* !!! CS8900 is __not__ tested on NIOS !!! */
-	/********************************************/
-#define CONFIG_NET_MULTI
-#define	CONFIG_CS8900		/* Using CS8900		*/
-#define	CONFIG_CS8900_BASE	(CONFIG_SYS_NIOS_CPU_LAN0_BASE + \
-				CONFIG_SYS_NIOS_CPU_LAN0_OFFS)
-
-#if	(CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32)
-#undef	CONFIG_CS8900_BUS16
-#define	CONFIG_CS8900_BUS32
-#else	/* no */
-#define	CONFIG_CS8900_BUS16
-#undef	CONFIG_CS8900_BUS32
-#endif
-
-#else
-#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config
-#endif
-
-#define CONFIG_ETHADDR		08:00:3e:26:0a:5b
-#define CONFIG_NETMASK		255.255.255.0
-#define CONFIG_IPADDR		192.168.2.21
-#define CONFIG_SERVERIP		192.168.2.16
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h
-#endif
-
-/*------------------------------------------------------------------------
- * STATUS LEDs
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO)
-
-#if	(CONFIG_SYS_NIOS_CPU_LED_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 2)
-
-#define	STATUS_LED_BASE			CONFIG_SYS_NIOS_CPU_PIO2
-#define	STATUS_LED_BITS			CONFIG_SYS_NIOS_CPU_PIO2_BITS
-#define	STATUS_LED_ACTIVE		1 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1)
-#define	STATUS_LED_WRONLY		1
-#else
-#undef	STATUS_LED_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 3)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_LED_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case
-#endif
-
-#define	CONFIG_STATUS_LED		1 /* enable status led driver */
-
-#define	STATUS_LED_BIT			(1 << 0)	/* LED[0] */
-#define	STATUS_LED_STATE		STATUS_LED_BLINKING
-#define	STATUS_LED_BOOT_STATE		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_BOOT			0		/* boot LED */
-
-#if	(STATUS_LED_BITS > 1)
-#define	STATUS_LED_BIT1			(1 << 1)	/* LED[1] */
-#define	STATUS_LED_STATE1		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 50)	/* ca. 5 Hz */
-#define	STATUS_LED_RED			1		/* fail LED */
-#endif
-
-#if	(STATUS_LED_BITS > 2)
-#define	STATUS_LED_BIT2			(1 << 2)	/* LED[2] */
-#define	STATUS_LED_STATE2		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD2		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_YELLOW		2		/* info LED */
-#endif
-
-#if	(STATUS_LED_BITS > 3)
-#define	STATUS_LED_BIT3			(1 << 3)	/* LED[3] */
-#define	STATUS_LED_STATE3		STATUS_LED_OFF
-#define	STATUS_LED_PERIOD3		(CONFIG_SYS_HZ / 10)	/* ca. 1 Hz */
-#define	STATUS_LED_GREEN		3		/* info LED */
-#endif
-
-#define	STATUS_LED_PAR			1 /* makes status_led.h happy */
-
-#endif	/* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*------------------------------------------------------------------------
- * SEVEN SEGMENT LED DISPLAY
- *----------------------------------------------------------------------*/
-#if	(CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO)
-
-#if	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3)
-
-#define	SEVENSEG_BASE			CONFIG_SYS_NIOS_CPU_PIO3
-#define	SEVENSEG_BITS			CONFIG_SYS_NIOS_CPU_PIO3_BITS
-#define	SEVENSEG_ACTIVE			0 /* LED on for bit == 1 */
-
-#if	(CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1)
-#define	SEVENSEG_WRONLY			1
-#else
-#undef	SEVENSEG_WRONLY
-#endif
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h
-
-#elif	(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9)
-
-#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h
-
-#else
-#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case
-#endif
-
-#define	CONFIG_SEVENSEG			1 /* enable seven segment led driver */
-
-/*
- * Dual 7-Segment Display pin assignment -- read more in your
- * "Nios Development Board Reference Manual"
- *
- *
- *    (U8) HI:D[15..8]     (U9) LO:D[7..0]
- *         ______               ______
- *        |  D14 |             |  D6  |
- *        |      |             |      |
- *      D9|      |D13        D1|      |D5
- *        |______|             |______|                  ___
- *        |  D8  |             |  D0  |                 | A |
- *        |      |             |      |                F|___|B
- *     D10|      |D12        D2|      |D4               | G |
- *        |______|             |______|                E|___|C
- *           D11  *               D3   *                  D  *
- *                D15                  D7                    DP
- *
- */
-#define	SEVENSEG_DIGIT_HI_LO_EQUAL	1	/* high nibble equal low nibble */
-#define	SEVENSEG_DIGIT_A		(1 << 6) /* bit 6 is segment A */
-#define	SEVENSEG_DIGIT_B		(1 << 5) /* bit 5 is segment B */
-#define	SEVENSEG_DIGIT_C		(1 << 4) /* bit 4 is segment C */
-#define	SEVENSEG_DIGIT_D		(1 << 3) /* bit 3 is segment D */
-#define	SEVENSEG_DIGIT_E		(1 << 2) /* bit 2 is segment E */
-#define	SEVENSEG_DIGIT_F		(1 << 1) /* bit 1 is segment F */
-#define	SEVENSEG_DIGIT_G		(1 << 0) /* bit 0 is segment G */
-#define	SEVENSEG_DIGIT_DP		(1 << 7) /* bit 7 is decimal point */
-
-#endif	/* CONFIG_SYS_NIOS_CPU_PIO_NUMS */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CDP
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DISPLAY
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
-
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-
-/*------------------------------------------------------------------------
- * KGDB
- *----------------------------------------------------------------------*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	9600
-#endif
-
-/*------------------------------------------------------------------------
- * MISC
- *----------------------------------------------------------------------*/
-#define	CONFIG_SYS_LONGHELP			    /* undef to save memory	*/
-#define	CONFIG_SYS_PROMPT		"DK1S10 > " /* Monitor Command Prompt	*/
-#define	CONFIG_SYS_CBSIZE		256	    /* Console I/O Buffer Size	*/
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16	    /* max number of command args*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
-
-/* Default load address	*/
-#if	(CONFIG_SYS_SRAM_SIZE != 0)
-
-/* default in SRAM */
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SRAM_BASE
-
-#elif	(CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* default in SDRAM */
-#if	(CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#define	CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#else
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
-#endif
-
-#else
-#undef	CONFIG_SYS_LOAD_ADDR		/* force error break */
-#endif
-
-
-/* MEM test area */
-#if	(CONFIG_SYS_SDRAM_SIZE != 0)
-
-/* SDRAM begin to stack area (1MB stack) */
-#if	(CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE)
-#define	CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE)
-#define	CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - (1024 * 1024))
-#else
-#define	CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define	CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_INIT_SP - (1024 * 1024))
-#endif
-
-#else
-#undef	CONFIG_SYS_MEMTEST_START	/* force error break */
-#undef	CONFIG_SYS_MEMTEST_END
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor0"
-#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-
-/* mtdparts command line support */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		""
-#define MTDPARTS_DEFAULT	""
-*/
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/DK1S10_mtx_ldk_20.h b/include/configs/DK1S10_mtx_ldk_20.h
deleted file mode 100644
index 87a8a54..0000000
--- a/include/configs/DK1S10_mtx_ldk_20.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_MTX_LDK_20_H
-#define __CONFIG_DK1S10_MTX_LDK_20_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- *	#define	CONFIG_SYS_NIOS_CPU_ICACHE	4096
- *	#define	CONFIG_SYS_NIOS_CPU_DCACHE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_BASE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_SIZE	0
- */
-
-/* CPU core */
-#define	CONFIG_SYS_NIOS_CPU_CLK	75000000	/* NIOS CPU clock	*/
-#define	CONFIG_SYS_NIOS_CPU_ICACHE	(0)		/* instruction cache	*/
-#define	CONFIG_SYS_NIOS_CPU_DCACHE	(0)		/* data cache		*/
-#define	CONFIG_SYS_NIOS_CPU_REG_NUMS	512		/* number of register	*/
-#define	CONFIG_SYS_NIOS_CPU_MUL	0		/* 16x16 MUL:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_MSTEP	1		/* 16x16 MSTEP:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_STACK	0x02000000	/* stack top	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_BASE	0x01000000	/* IRQ vectors	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_SIZE	256		/*		size	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_NUMS	64		/*		numbers	*/
-#define	CONFIG_SYS_NIOS_CPU_RST_VECT	0x00000000	/* RESET vector	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_DBG_CORE	0		/* CPU debug:	no(0)	*/
-						/*		yes(1)	*/
-
-/* The offset address in flash to check for the Nios signature "Ni".
- * (see GM_FlashExec in germs_monitor.s) */
-#define	CONFIG_SYS_NIOS_CPU_EXES_OFFS	0x0C
-
-/* on-chip extensions */
-#undef	CONFIG_SYS_NIOS_CPU_RAM_BASE			/* on chip RAM	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_RAM_SIZE			/* 64 KB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_ROM_BASE	0x00000000	/* on chip ROM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_ROM_SIZE	(2 * 1024)	/*  2 KB	size	*/
-
-#undef	CONFIG_SYS_NIOS_CPU_OCI_BASE			/* OCI core	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_OCI_SIZE			/*		size	*/
-
-/* timer */
-#define	CONFIG_SYS_NIOS_CPU_TIMER_NUMS	1		/* number of timer	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER0	0x00000840	/* TIMER0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_IRQ	16		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_PER	1000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_AR	0		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_FP	0		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_SS	1		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-/* serial i/o */
-#define	CONFIG_SYS_NIOS_CPU_UART_NUMS	2		/* number of uarts	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART0	0x00000800	/* UART0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_IRQ	17		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_SB	2		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_HS	0		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART1	0x000008a0	/* UART1	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_IRQ	18		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_SB	1		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_HS	0		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART1_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-/* parallel i/o */
-#define	CONFIG_SYS_NIOS_CPU_PIO_NUMS	2		/* number of parports	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO0	0x00000860	/* PIO0		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO0_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO1	0x00000870	/* PIO1		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO1_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_BITS	4		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-/* IDE i/f */
-#define	CONFIG_SYS_NIOS_CPU_IDE_NUMS	1		/* number of IDE contr.	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE0	0x00000900	/* IDE0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE0_IRQ	25		/*		IRQ	*/
-
-/* memory accessibility */
-#undef	CONFIG_SYS_NIOS_CPU_SRAM_BASE			/* board SRAM	addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_SRAM_SIZE			/*  1 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_BASE	0x01000000	/* board SDRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_SIZE	(16*1024*1024)	/* 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_FLASH_BASE	0x00800000	/* board Flash	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_FLASH_SIZE	(8*1024*1024)	/*  8 MB	size	*/
-
-/* LAN */
-#define	CONFIG_SYS_NIOS_CPU_LAN_NUMS	1		/* number of LAN i/f	*/
-
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BASE	0x00010000	/* LAN0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_OFFS	0x0300		/*		offset	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_IRQ	20		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BUSW	32		/*	        buswidth*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_TYPE	0		/*	smc91111(0)	*/
-						/*	cs8900(1)	*/
-						/* ex:	openmac(2)	*/
-						/* ex:	alteramac(3)	*/
-
-/* symbolic redefinition (undef, if not present) */
-#define	CONFIG_SYS_NIOS_CPU_TICK_TIMER		0	/* TIMER0: tick (needed)*/
-#undef	CONFIG_SYS_NIOS_CPU_USER_TIMER			/* TIMERx: users choice	*/
-
-#define	CONFIG_SYS_NIOS_CPU_CFPOWER_PIO	0	/* PIO0: CF power/sw.	*/
-#define	CONFIG_SYS_NIOS_CPU_BUTTON_PIO		1	/* PIO1: buttons	*/
-#undef	CONFIG_SYS_NIOS_CPU_LCD_PIO			/* PIOx: ASCII LCD	*/
-#undef	CONFIG_SYS_NIOS_CPU_LED_PIO			/* PIOx: LED bar	*/
-#undef	CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO		/* PIOx: 7-seg. display	*/
-#undef	CONFIG_SYS_NIOS_CPU_RECONF_PIO			/* PIOx: reconf pin	*/
-#undef	CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO		/* PIOx: CF present IRQ	*/
-#undef	CONFIG_SYS_NIOS_CPU_CFATASEL_PIO		/* PIOx: CF ATA select	*/
-
-#endif	/* __CONFIG_DK1S10_MTX_LDK_20_H */
diff --git a/include/configs/DK1S10_safe_32.h b/include/configs/DK1S10_safe_32.h
deleted file mode 100644
index ced4ef2..0000000
--- a/include/configs/DK1S10_safe_32.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_SAFE_32_H
-#define __CONFIG_DK1S10_SAFE_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * !!! TODO !!! TODO !!!
- */
-#error *** CONFIG_SYS_ERROR: DK1S10_safe_32 have to be defined (use DK1S10_standard_32 as template)
-
-#endif	/* __CONFIG_DK1S10_SAFE_32_H */
diff --git a/include/configs/DK1S10_standard_32.h b/include/configs/DK1S10_standard_32.h
deleted file mode 100644
index e6ccaf5..0000000
--- a/include/configs/DK1S10_standard_32.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
- * Stephan Linz <linz@li-pro.net>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_DK1S10_STANDARD_32_H
-#define __CONFIG_DK1S10_STANDARD_32_H
-
-/*
- * NIOS CPU configuration. (PART OF configs/DK1S10.h)
- *
- * Here we must define CPU dependencies. Any unsupported option have to
- * be defined with zero, example CPU without data cache / OCI:
- *
- *	#define	CONFIG_SYS_NIOS_CPU_ICACHE	4096
- *	#define	CONFIG_SYS_NIOS_CPU_DCACHE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_BASE	0
- *	#define	CONFIG_SYS_NIOS_CPU_OCI_SIZE	0
- */
-
-/* CPU core */
-#define	CONFIG_SYS_NIOS_CPU_CLK	50000000	/* NIOS CPU clock	*/
-#define	CONFIG_SYS_NIOS_CPU_ICACHE	(4 * 1024)	/* instruction cache	*/
-#define	CONFIG_SYS_NIOS_CPU_DCACHE	(4 * 1024)	/* data cache		*/
-#define	CONFIG_SYS_NIOS_CPU_REG_NUMS	256		/* number of register	*/
-#define	CONFIG_SYS_NIOS_CPU_MUL	0		/* 16x16 MUL:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_MSTEP	1		/* 16x16 MSTEP:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_STACK	0x008fff00	/* stack top	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_BASE	0x008fff00	/* IRQ vectors	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_SIZE	256		/*		size	*/
-#define	CONFIG_SYS_NIOS_CPU_VEC_NUMS	64		/*		numbers	*/
-#define	CONFIG_SYS_NIOS_CPU_RST_VECT	0x00920000	/* RESET vector	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_DBG_CORE	0		/* CPU debug:	no(0)	*/
-						/*		yes(1)	*/
-
-/* on-chip extensions */
-#define	CONFIG_SYS_NIOS_CPU_RAM_BASE	0x00900000	/* on chip RAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_RAM_SIZE	(64 * 1024)	/* 64 KB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_ROM_BASE	0x00920000	/* on chip ROM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_ROM_SIZE	(2 * 1024)	/*  2 KB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_OCI_BASE	0x00920800	/* OCI core	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_OCI_SIZE	256		/*		size	*/
-
-/* timer */
-#define	CONFIG_SYS_NIOS_CPU_TIMER_NUMS	2		/* number of timer	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER0	0x00920940	/* TIMER0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_IRQ	16		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_PER	1000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_AR	0		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_FP	0		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER0_SS	1		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_TIMER1	0x009209e0	/* TIMER1	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_IRQ	50		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_PER	10000		/*  periode	usec	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_AR	1		/*  always run:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_FP	1		/*  fixed per:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_TIMER1_SS	0		/*  snaphot:	no(0)	*/
-						/*		yes(1)	*/
-
-/* serial i/o */
-#define	CONFIG_SYS_NIOS_CPU_UART_NUMS	1		/* number of uarts	*/
-
-#define	CONFIG_SYS_NIOS_CPU_UART0	0x00920900	/* UART0	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_IRQ	25		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_BR	115200		/*  baudrate	var(0)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_DB	8		/*  data bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_SB	1		/*  stop bit		*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_PA	0		/*  parity	none(0)	*/
-						/*		odd(1)	*/
-						/*		even(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_HS	0		/*  handshake:	no(0)	*/
-						/*		crts(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_UART0_EOP	0		/*  eop reg:	no(0)	*/
-						/*		yes(1)	*/
-
-/* parallel i/o */
-#define	CONFIG_SYS_NIOS_CPU_PIO_NUMS	8		/* number of parports	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO0	0x00920960	/* PIO0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_IRQ	40		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_BITS	4		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_EDGE	3		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO0_ITYPE	2		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO1	0x00920970	/* PIO1		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO1_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_BITS	11		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO1_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO2	0x00920980	/* PIO2		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO2_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_BITS	8		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO2_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO3	0x00920990	/* PIO3		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO3_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_BITS	16		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO3_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO4	0x009209a0	/* PIO4		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO4_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_TYPE	0		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO4_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO5	0x009209b0	/* PIO5		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_IRQ	35		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_TYPE	2		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_CAP	1		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_EDGE	3		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO5_ITYPE	2		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO6	0x009209c0	/* PIO6		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO6_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO6_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-#define	CONFIG_SYS_NIOS_CPU_PIO7	0x009209d0	/* PIO7		addr	*/
-#undef	CONFIG_SYS_NIOS_CPU_PIO7_IRQ			/*		w/o IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_BITS	1		/*  number  of  bits	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_TYPE	1		/*  io type:	tris(0)	*/
-						/*		out(1)	*/
-						/*		in(2)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_CAP	0		/*  capture:	no(0)	*/
-						/*		yes(1)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_EDGE	0		/*  edge type:	none(0)	*/
-						/*		fall(1)	*/
-						/*		rise(2)	*/
-						/*		any(3)	*/
-#define	CONFIG_SYS_NIOS_CPU_PIO7_ITYPE	0		/*  IRQ type:	none(0)	*/
-						/*		level(1)*/
-						/*		edge(2)	*/
-
-/* IDE i/f */
-#define	CONFIG_SYS_NIOS_CPU_IDE_NUMS	1		/* number of IDE contr.	*/
-#define	CONFIG_SYS_NIOS_CPU_IDE0	0x00920a00	/* IDE0		addr	*/
-
-/* memory accessibility */
-#define	CONFIG_SYS_NIOS_CPU_SRAM_BASE	0x00800000	/* board SRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SRAM_SIZE	(1024 * 1024)	/*  1 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_BASE	0x01000000	/* board SDRAM	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_SDRAM_SIZE	(16*1024*1024)	/* 16 MB	size	*/
-
-#define	CONFIG_SYS_NIOS_CPU_FLASH_BASE	0x00000000	/* board Flash	addr	*/
-#define	CONFIG_SYS_NIOS_CPU_FLASH_SIZE	(8*1024*1024)	/*  8 MB	size	*/
-
-/* LAN */
-#define	CONFIG_SYS_NIOS_CPU_LAN_NUMS	1		/* number of LAN i/f	*/
-
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BASE	0x00910000	/* LAN0		addr	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_OFFS	0x0300		/*		offset	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_IRQ	30		/*		IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_BUSW	32		/*	        buswidth*/
-#define	CONFIG_SYS_NIOS_CPU_LAN0_TYPE	0		/*	smc91111(0)	*/
-						/*	cs8900(1)	*/
-						/* ex:	alteramac(2)	*/
-
-/* symbolic redefinition (undef, if not present) */
-#define	CONFIG_SYS_NIOS_CPU_USER_TIMER		0	/* TIMER0: users choice	*/
-#define	CONFIG_SYS_NIOS_CPU_TICK_TIMER		1	/* TIMER1: tick (needed)*/
-
-#define	CONFIG_SYS_NIOS_CPU_BUTTON_PIO		0	/* PIO0: buttons	*/
-#define	CONFIG_SYS_NIOS_CPU_LCD_PIO		1	/* PIO1: ASCII LCD	*/
-#define	CONFIG_SYS_NIOS_CPU_LED_PIO		2	/* PIO2: LED bar	*/
-#define	CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO	3	/* PIO3: 7-seg. display	*/
-#define	CONFIG_SYS_NIOS_CPU_RECONF_PIO		4	/* PIO4: reconf pin	*/
-#define	CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO	5	/* PIO5: CF present IRQ	*/
-#define	CONFIG_SYS_NIOS_CPU_CFPOWER_PIO	6	/* PIO6: CF power/sw.	*/
-#define	CONFIG_SYS_NIOS_CPU_CFATASEL_PIO	7	/* PIO7: CF ATA select	*/
-
-#endif	/* __CONFIG_DK1S10_STANDARD_32_H */
diff --git a/include/image.h b/include/image.h
index 541cac9..294eba5 100644
--- a/include/image.h
+++ b/include/image.h
@@ -100,7 +100,6 @@
 #define IH_ARCH_SPARC		10	/* Sparc	*/
 #define IH_ARCH_SPARC64		11	/* Sparc 64 Bit */
 #define IH_ARCH_M68K		12	/* M68K		*/
-#define IH_ARCH_NIOS		13	/* Nios-32	*/
 #define IH_ARCH_MICROBLAZE	14	/* MicroBlaze   */
 #define IH_ARCH_NIOS2		15	/* Nios-II	*/
 #define IH_ARCH_BLACKFIN	16	/* Blackfin	*/
@@ -493,8 +492,6 @@ static inline int image_check_target_arch (const image_header_t *hdr)
 	if (!image_check_arch (hdr, IH_ARCH_MICROBLAZE))
 #elif defined(__mips__)
 	if (!image_check_arch (hdr, IH_ARCH_MIPS))
-#elif defined(__nios__)
-	if (!image_check_arch (hdr, IH_ARCH_NIOS))
 #elif defined(__nios2__)
 	if (!image_check_arch (hdr, IH_ARCH_NIOS2))
 #elif defined(__PPC__)
@@ -647,8 +644,6 @@ static inline int fit_image_check_target_arch (const void *fdt, int node)
 	if (!fit_image_check_arch (fdt, node, IH_ARCH_MICROBLAZE))
 #elif defined(__mips__)
 	if (!fit_image_check_arch (fdt, node, IH_ARCH_MIPS))
-#elif defined(__nios__)
-	if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS))
 #elif defined(__nios2__)
 	if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS2))
 #elif defined(__PPC__)
diff --git a/include/nios-io.h b/include/nios-io.h
deleted file mode 100644
index dc7e127..0000000
--- a/include/nios-io.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*************************************************************************
- * Altera Nios Standard Peripherals
- ************************************************************************/
-
-#ifndef __NIOSIO_H__
-#define __NIOSIO_H__
-
-/*------------------------------------------------------------------------
- * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_uart_t {
-	unsigned	rxdata;		/* Rx data reg */
-	unsigned	txdata;		/* Tx data reg */
-	unsigned	status;		/* Status reg */
-	unsigned	control;	/* Control reg */
-	unsigned	divisor;	/* Baud rate divisor reg */
-	unsigned	endofpacket;	/* End-of-packet reg */
-}nios_uart_t;
-
-/* status register */
-#define NIOS_UART_PE		(1 << 0)	/* parity error */
-#define NIOS_UART_FE		(1 << 1)	/* frame error */
-#define NIOS_UART_BRK		(1 << 2)	/* break detect */
-#define NIOS_UART_ROE		(1 << 3)	/* rx overrun */
-#define NIOS_UART_TOE		(1 << 4)	/* tx overrun */
-#define NIOS_UART_TMT		(1 << 5)	/* tx empty */
-#define NIOS_UART_TRDY		(1 << 6)	/* tx ready */
-#define NIOS_UART_RRDY		(1 << 7)	/* rx ready */
-#define NIOS_UART_E		(1 << 8)	/* exception */
-#define NIOS_UART_DCTS		(1 << 10)	/* cts change */
-#define NIOS_UART_CTS		(1 << 11)	/* cts */
-#define NIOS_UART_EOP		(1 << 12)	/* eop detected */
-
-/* control register */
-#define NIOS_UART_IPE		(1 << 0)	/* parity error int ena*/
-#define NIOS_UART_IFE		(1 << 1)	/* frame error int ena */
-#define NIOS_UART_IBRK		(1 << 2)	/* break detect int ena */
-#define NIOS_UART_IROE		(1 << 3)	/* rx overrun int ena */
-#define NIOS_UART_ITOE		(1 << 4)	/* tx overrun int ena */
-#define NIOS_UART_ITMT		(1 << 5)	/* tx empty int ena */
-#define NIOS_UART_ITRDY		(1 << 6)	/* tx ready int ena */
-#define NIOS_UART_IRRDY		(1 << 7)	/* rx ready int ena */
-#define NIOS_UART_IE		(1 << 8)	/* exception int ena */
-#define NIOS_UART_TBRK		(1 << 9)	/* transmit break */
-#define NIOS_UART_IDCTS		(1 << 10)	/* cts change int ena */
-#define NIOS_UART_RTS		(1 << 11)	/* rts */
-#define NIOS_UART_IEOP		(1 << 12)	/* eop detected int ena */
-
-
-/*------------------------------------------------------------------------
- * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_timer_t {
-	unsigned	status;			/* Timer status reg */
-	unsigned	control;		/* Timer control reg */
-	unsigned	periodl;		/* Timeout period low */
-	unsigned	periodh;		/* Timeout period high */
-	unsigned	snapl;			/* Snapshot low */
-	unsigned	snaph;			/* Snapshot high */
-}nios_timer_t;
-
-/* status register */
-#define NIOS_TIMER_TO		(1 << 0)	/* Timeout */
-#define NIOS_TIMER_RUN		(1 << 1)	/* Timer running */
-
-/* control register */
-#define NIOS_TIMER_ITO		(1 << 0)	/* Timeout int ena */
-#define NIOS_TIMER_CONT		(1 << 1)	/* Continuous mode */
-#define NIOS_TIMER_START	(1 << 2)	/* Start timer */
-#define NIOS_TIMER_STOP		(1 << 3)	/* Stop timer */
-
-
-/*------------------------------------------------------------------------
- * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_pio_t {
-	unsigned int	data;		/* Data value at each PIO in/out */
-	unsigned int	direction;	/* Data direct. for each PIO bit */
-	unsigned int	interruptmask;	/* Per-bit IRQ enable/disable */
-	unsigned int	edgecapture;	/* Per-bit sync. edge detect & hold */
-}nios_pio_t;
-
-/* direction register */
-#define NIOS_PIO_OUT		(1)		/* PIO bit is output */
-#define NIOS_PIO_IN		(0)		/* PIO bit is input */
-
-
-/*------------------------------------------------------------------------
- * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf)
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_spi_t {
-	unsigned	rxdata;		/* Rx data reg */
-	unsigned	txdata;		/* Tx data reg */
-	unsigned	status;		/* Status reg */
-	unsigned	control;	/* Control reg */
-	unsigned	reserved;	/* (master only) */
-	unsigned	slaveselect;	/* SPI slave select mask (master only) */
-}nios_spi_t;
-
-/* status register */
-#define NIOS_SPI_ROE		(1 << 3)	/* rx overrun */
-#define NIOS_SPI_TOE		(1 << 4)	/* tx overrun */
-#define NIOS_SPI_TMT		(1 << 5)	/* tx empty */
-#define NIOS_SPI_TRDY		(1 << 6)	/* tx ready */
-#define NIOS_SPI_RRDY		(1 << 7)	/* rx ready */
-#define NIOS_SPI_E		(1 << 8)	/* exception */
-
-/* control register */
-#define NIOS_SPI_IROE		(1 << 3)	/* rx overrun int ena */
-#define NIOS_SPI_ITOE		(1 << 4)	/* tx overrun int ena */
-#define NIOS_SPI_ITRDY		(1 << 6)	/* tx ready int ena */
-#define NIOS_SPI_IRRDY		(1 << 7)	/* rx ready int ena */
-#define NIOS_SPI_IE		(1 << 8)	/* exception int ena */
-#define NIOS_SPI_SSO		(1 << 10)	/* override SS_n output */
-
-/*------------------------------------------------------------------------
- * ASMI
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_asmi_t {
-	unsigned	rxdata;		/* Rx data reg */
-	unsigned	txdata;		/* Tx data reg */
-	unsigned	status;		/* Status reg */
-	unsigned	control;	/* Control reg */
-	unsigned	reserved;
-	unsigned	slavesel;	/* Slave select */
-	unsigned	endofpacket;	/* End-of-packet reg */
-}nios_asmi_t;
-
-/* status register */
-#define NIOS_ASMI_ROE		(1 << 3)	/* rx overrun */
-#define NIOS_ASMI_TOE		(1 << 4)	/* tx overrun */
-#define NIOS_ASMI_TMT		(1 << 5)	/* tx empty */
-#define NIOS_ASMI_TRDY		(1 << 6)	/* tx ready */
-#define NIOS_ASMI_RRDY		(1 << 7)	/* rx ready */
-#define NIOS_ASMI_E		(1 << 8)	/* exception */
-#define NIOS_ASMI_EOP		(1 << 9)	/* eop detected */
-
-/* control register */
-#define NIOS_ASMI_IROE		(1 << 3)	/* rx overrun int ena */
-#define NIOS_ASMI_ITOE		(1 << 4)	/* tx overrun int ena */
-#define NIOS_ASMI_ITRDY		(1 << 6)	/* tx ready int ena */
-#define NIOS_ASMI_IRRDY		(1 << 7)	/* rx ready int ena */
-#define NIOS_ASMI_IE		(1 << 8)	/* exception int ena */
-#define NIOS_ASMI_IEOP		(1 << 9)	/* rx eop int ena */
-#define NIOS_ASMI_SSO		(1 << 10)	/* slave select enable */
-
-/*------------------------------------------------------------------------
- * JTAG UART
- *----------------------------------------------------------------------*/
-typedef volatile struct nios_jtag_t {
-	unsigned short	rxcntl;			/* Rx data/cntl reg */
-	unsigned short	txcntl;			/* Tx data/cntl reg */
-	unsigned short	errcntl;		/* Err dta/cntl reg */
-}nios_jtag_t;
-
-/* status register */
-#define NIOS_JTAG_TRDY		(1 << 8)	/* tx ready bit */
-#define NIOS_JTAG_RRDY		(1 << 8)	/* rx ready bit */
-
-#endif /* __NIOSIO_H__ */
diff --git a/include/nios.h b/include/nios.h
deleted file mode 100644
index 46b685a..0000000
--- a/include/nios.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __NIOS_H__
-#define __NIOS_H__
-
-/*------------------------------------------------------------------------
- * Control registers -- use with wrctl() & rdctl()
- *----------------------------------------------------------------------*/
-#define CTL_STATUS	0x00		/* Processor status		*/
-#define CTL_ISTATUS	0x01		/* Saved status (exception)	*/
-#define CTL_WVALID	0x02		/* Valid window limit		*/
-#define CTL_ICACHE	0x05		/* I-cache line-invalidate	*/
-#define CTL_CPU_ID	0x06		/* CPU version id		*/
-#define CTL_DCACHE	0x07		/* D-cache line-invalidate	*/
-#define CTL_CLR_IE	0x08		/* Interrupt clear (disable)	*/
-#define CTL_SET_IE	0x09		/* Interrupt set (enable)	*/
-
-/*------------------------------------------------------------------------
- * Access to control regs
- *----------------------------------------------------------------------*/
-#define _str_(s)	#s
-
-#define rdctl(reg)\
-	({unsigned int val;\
-	asm volatile( "pfx " _str_(reg) "\n\t rdctl %0"\
-		: "=r" (val) ); val;})
-
-#define wrctl(reg,val)\
-	asm volatile( "pfx " _str_(reg) "\n\t wrctl %0 \n\t nop"\
-		: : "r" (val))
-
-/*------------------------------------------------------------------------
- * Control reg bit masks
- *----------------------------------------------------------------------*/
-#define STATUS_DC	(1<<17)		/* Data cache enable		*/
-#define STATUS_IC	(1<<16)		/* Instruction cache enable	*/
-#define STATUS_IE	(1<<15)		/* Interrupt enable		*/
-#define STATUS_IPRI	(0x3f<<9)	/* Interrupt priority		*/
-#define STATUS_CWP	(0x1f<<4)	/* Current window pointer	*/
-#define STATUS_N	(1<<3)		/* Condition code: negative	*/
-#define STATUS_V	(1<<2)		/* Condition code: overflow	*/
-#define STATUS_Z	(1<<1)		/* Condition code: zero		*/
-#define STATUS_C	(1<<0)		/* Condition code: carry/borrow */
-
-static inline unsigned ipri( unsigned prio )
-{
-	unsigned tmp;
-	unsigned status = rdctl(CTL_STATUS);
-	prio = (prio << 9) & STATUS_IPRI;
-	tmp = (status & ~STATUS_IPRI) | prio;
-	wrctl(CTL_STATUS,tmp);
-	return( (status & STATUS_IPRI) >> 9);
-}
-
-
-#endif /* __NIOS_H__ */
diff --git a/include/watchdog.h b/include/watchdog.h
index ef2f5aa..b959914 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -31,10 +31,6 @@
 #  error "Configuration error: CONFIG_HW_WATCHDOG and CONFIG_WATCHDOG can't be used together."
 #endif
 
-#if defined(__ASSEMBLY__) && defined(__NIOS__)
-#  error "Configuration error: WATCHDOG_RESET inside assembler not supported for Nios platforms."
-#endif
-
 /*
  * Hardware watchdog
  */