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authorWolfgang Denk <wd@denx.de>2009-03-15 22:15:13 +0100
committerWolfgang Denk <wd@denx.de>2009-03-15 22:15:13 +0100
commite05825324a8a7679b87db550a0d7ade06c890494 (patch)
treed55e616216d4609eeb3ae629aaa6aacbfcb5fd94 /include
parent45f93d4e3c0d2a083131d1c579908bfeb3011bb1 (diff)
parent94a353611b93ac4cb4434a5f7e98aa0902da919e (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/cpu_sh4.h25
-rw-r--r--include/configs/r2dplus.h3
-rw-r--r--include/configs/r7780mp.h3
-rw-r--r--include/configs/sh7785lcr.h26
4 files changed, 57 insertions, 0 deletions
diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h
index d2dbfcd..fdcebd6 100644
--- a/include/asm-sh/cpu_sh4.h
+++ b/include/asm-sh/cpu_sh4.h
@@ -54,4 +54,29 @@
# error "Unknown SH4 variant"
#endif
+#if defined(CONFIG_SH_32BIT)
+#define PMB_ADDR_ARRAY 0xf6100000
+#define PMB_ADDR_ENTRY 8
+#define PMB_VPN 24
+
+#define PMB_DATA_ARRAY 0xf7100000
+#define PMB_DATA_ENTRY 8
+#define PMB_PPN 24
+#define PMB_UB 9 /* Buffered write */
+#define PMB_V 8 /* Valid */
+#define PMB_SZ1 7 /* Page size (upper bit) */
+#define PMB_SZ0 4 /* Page size (lower bit) */
+#define PMB_C 3 /* Cacheability */
+#define PMB_WT 0 /* Write-through */
+
+#define PMB_ADDR_BASE(entry) (PMB_ADDR_ARRAY + (entry << PMB_ADDR_ENTRY))
+#define PMB_DATA_BASE(entry) (PMB_DATA_ARRAY + (entry << PMB_DATA_ENTRY))
+#define mk_pmb_addr_val(vpn) ((vpn << PMB_VPN))
+#define mk_pmb_data_val(ppn, ub, v, sz1, sz0, c, wt) \
+ ((ppn << PMB_PPN) | (ub << PMB_UB) | \
+ (v << PMB_V) | (sz1 << PMB_SZ1) | \
+ (sz0 << PMB_SZ0) | (c << PMB_C) | \
+ (wt << PMB_WT))
+#endif
+
#endif /* _ASM_CPU_SH4_H_ */
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 6921759..6fa1eaf 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -114,6 +114,9 @@
#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
+#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
+#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
+#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
/*
* Network device (RTL8139) support
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 72a3b5c..88eb568 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -129,6 +129,9 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
+#define CONFIG_SH7780_PCI_LSR 0x07f00001
+#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1
#define __io
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index 537ec4e..21c3f70 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -61,11 +61,20 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
/* MEMORY */
+#if defined(CONFIG_SH_32BIT)
+#define SH7785LCR_SDRAM_PHYS_BASE (0x48000000)
+#define SH7785LCR_SDRAM_BASE (0x88000000)
+#define SH7785LCR_SDRAM_SIZE (384 * 1024 * 1024)
+#define SH7785LCR_FLASH_BASE_1 (0xa0000000)
+#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024)
+#define SH7785LCR_USB_BASE (0xa6000000)
+#else
#define SH7785LCR_SDRAM_BASE (0x08000000)
#define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024)
#define SH7785LCR_FLASH_BASE_1 (0xa0000000)
#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024)
#define SH7785LCR_USB_BASE (0xb4000000)
+#endif
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
@@ -133,6 +142,15 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
+#if defined(CONFIG_SH_32BIT)
+#define CONFIG_SH7780_PCI_LSR 0x1ff00001
+#define CONFIG_SH7780_PCI_LAR 0x5f000000
+#define CONFIG_SH7780_PCI_BAR 0x5f000000
+#else
+#define CONFIG_SH7780_PCI_LSR 0x07f00001
+#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
+#endif
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1
@@ -144,6 +162,14 @@
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
+#if defined(CONFIG_SH_32BIT)
+#define CONFIG_PCI_SYS_PHYS SH7785LCR_SDRAM_PHYS_BASE
+#else
+#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
+#endif
+#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
+
/* Network device (RTL8169) support */
#define CONFIG_NET_MULTI
#define CONFIG_RTL8169