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| author | Andy Fleming <afleming@freescale.com> | 2008-08-31 16:33:30 -0500 |
|---|---|---|
| committer | Ben Warren <biggerbadderben@gmail.com> | 2008-09-02 21:18:15 -0700 |
| commit | 5a8a163ac394d9f4f7ff57f415d82bd673b0068c (patch) | |
| tree | b0363871b5e73d52f553867e6df7ec8ad6877072 /include | |
| parent | 216f2a7156a5fde7b47adc40ad553c888a9cbaa7 (diff) | |
| download | u-boot-imx-5a8a163ac394d9f4f7ff57f415d82bd673b0068c.zip u-boot-imx-5a8a163ac394d9f4f7ff57f415d82bd673b0068c.tar.gz u-boot-imx-5a8a163ac394d9f4f7ff57f415d82bd673b0068c.tar.bz2 | |
Add pixis_set_sgmii command
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface. Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports. This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis. Either way
requires a reboot.
This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports. It also allows users
to revert to the current switch settings.
This code does not work on the 8572, as the PIXIS is different.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/MPC8544DS.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index a428e88..612e8f2 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -196,7 +196,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define PIXIS_VSPEED2 0x1d /* VELA VSpeed 2 */ #define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ +#define PIXIS_VSPEED2_TSEC1SER 0x2 +#define PIXIS_VSPEED2_TSEC3SER 0x1 +#define PIXIS_VCFGEN1_TSEC1SER 0x20 +#define PIXIS_VCFGEN1_TSEC3SER 0x40 /* define to use L1 as initial stack */ |