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| author | Peng Fan <peng.fan@nxp.com> | 2016-02-25 09:43:34 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-03-25 15:01:27 +0800 |
| commit | cc3a9c3f0ad99e0d2d89d5ddb84c3e727fe85af4 (patch) | |
| tree | eb750449c0725ddcc957428dbb6ebeda6a4dbbe8 /include | |
| parent | 77a21ec5afd23bdf1a32bbe32f9be521b944ad2f (diff) | |
| download | u-boot-imx-cc3a9c3f0ad99e0d2d89d5ddb84c3e727fe85af4.zip u-boot-imx-cc3a9c3f0ad99e0d2d89d5ddb84c3e727fe85af4.tar.gz u-boot-imx-cc3a9c3f0ad99e0d2d89d5ddb84c3e727fe85af4.tar.bz2 | |
MLK-12436-15: imx: mx7dsdb: add RevB support
Add RevB board support and Align with imx_v2015.04.
imx_v2015.04 commit:
"
commit f026a65375094cc2c0e25ed11772aee9362ee63d
Author: Ye.Li <B37916@freescale.com>
Date: Thu Dec 17 11:39:09 2015 +0800
MLK-12034 imx: mx7dsabresd: Add RevB board support
Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
"
Also update pmic settings to align with datasheet.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mx7dsabresd.h | 13 | ||||
| -rw-r--r-- | include/power/pfuze3000_pmic.h | 4 |
2 files changed, 15 insertions, 2 deletions
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 215a76d..c407f91 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -27,13 +27,22 @@ #define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_PHYLIB #define CONFIG_PHY_BROADCOM /* ENET1 */ + +#define CONFIG_FEC_ENET_DEV 0 + +#if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE ENET_IPS_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x0 +#elif (CONFIG_FEC_ENET_DEV == 1) +#define IMX_FEC_BASE ENET2_IPS_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#endif +#define CONFIG_FEC_MXC_MDIO_BASE ENET_IPS_BASE_ADDR /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -279,6 +288,8 @@ #define CONFIG_DFU_MMC #define CONFIG_DFU_RAM +#define CONFIG_CMD_BMODE + #define CONFIG_VIDEO #ifdef CONFIG_VIDEO #define CONFIG_CFB_CONSOLE diff --git a/include/power/pfuze3000_pmic.h b/include/power/pfuze3000_pmic.h index e8b892b..42e494c 100644 --- a/include/power/pfuze3000_pmic.h +++ b/include/power/pfuze3000_pmic.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2015 Freescale Semiconductor, Inc + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc * Peng Fan <Peng.Fan@freescale.com> * * SPDX-License-Identifier: GPL-2.0+ @@ -73,6 +73,8 @@ enum { PMIC_NUM_OF_REGS = 0x7F, }; +#define PFUZE3000_SW1AB_SETP(x) (((x) - 700) / 25) + int power_pfuze3000_init(unsigned char bus); #endif |