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authorMichal Simek <michal.simek@xilinx.com>2015-11-20 13:17:22 +0100
committerMichal Simek <michal.simek@xilinx.com>2016-05-24 11:15:01 +0200
commite6a9ed04e78cf87ec97e306fa4e7a1669ef98df6 (patch)
treef11d03e2d2633a927c212d3184b984b61e105cae /include
parentc9811e14cfee68e3df054fd1597064f58c4e7e27 (diff)
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ARM64: zynqmp: Add SPL support support
Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/xilinx_zynqmp.h43
1 files changed, 41 insertions, 2 deletions
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 1a1892d..b2fa164 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -41,7 +41,7 @@
# define CONFIG_IDENT_STRING " Xilinx ZynqMP"
#endif
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_INIT_SP_ADDR 0xfffffffc
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
@@ -65,7 +65,9 @@
#define CONFIG_CMD_ENV
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
-#define CONFIG_ISO_PARTITION
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_ISO_PARTITION
+#endif
#define CONFIG_MP
/* BOOTP options */
@@ -228,4 +230,41 @@
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_CLOCKS
+#define CONFIG_SPL_TEXT_BASE 0xfffc0000
+#define CONFIG_SPL_MAX_SIZE 0x20000
+
+/* Just random location in OCM */
+#define CONFIG_SPL_BSS_START_ADDR 0x1000000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x2000000
+
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_RAM_DEVICE
+
+#define CONFIG_SPL_OS_BOOT
+/* u-boot is like dtb */
+#define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin"
+#define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000
+
+/* ATF is my kernel image */
+#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf.ub"
+
+/* FIT load address for RAM boot */
+#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
+
+/* MMC support */
+#ifdef CONFIG_ZYNQ_SDHCI
+# define CONFIG_SPL_MMC_SUPPORT
+# define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
+# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */
+# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */
+# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */
+# define CONFIG_SPL_LIBDISK_SUPPORT
+# define CONFIG_SPL_FAT_SUPPORT
+# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
+#endif
+
#endif /* __XILINX_ZYNQMP_H */