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| author | Stefan Roese <sr@denx.de> | 2015-12-03 12:39:45 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2016-01-14 14:08:59 +0100 |
| commit | c4be10b5696382c51e41e0d02fb577d3b39e8636 (patch) | |
| tree | f3a0a1d2cbff9b80c285dd5d88df124bef7bd79f /include | |
| parent | 169789dcb9b7ef1a97bf1aa245316687d7ced40f (diff) | |
| download | u-boot-imx-c4be10b5696382c51e41e0d02fb577d3b39e8636.zip u-boot-imx-c4be10b5696382c51e41e0d02fb577d3b39e8636.tar.gz u-boot-imx-c4be10b5696382c51e41e0d02fb577d3b39e8636.tar.bz2 | |
arm: mvebu: db-mv784mp-gp: Switch from IDE to SATA support
Enable the newly introduced SATA driver for the Marvell AXP with DMA
support instead of the PIO-only IDE driver. This increases the
transfer speed. And is also more in-line with the Armada 38x
ports, which also use a SATA driver (AHCI) and the "sata" U-Boot
commands.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/db-mv784mp-gp.h | 34 |
1 files changed, 7 insertions, 27 deletions
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 886f313..65e78b8 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Stefan Roese <sr@denx.de> + * Copyright (C) 2014-2015 Stefan Roese <sr@denx.de> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -30,10 +30,10 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI #define CONFIG_CMD_PING +#define CONFIG_CMD_SATA #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_CMD_TFTPPUT @@ -67,32 +67,12 @@ #define CONFIG_SYS_ALT_MEMTEST /* SATA support */ -#ifdef CONFIG_CMD_IDE -#define __io -#define CONFIG_IDE_PREINIT -#define CONFIG_MVSATA_IDE - -/* Needs byte-swapping for ATA data register */ -#define CONFIG_IDE_SWAP_IO - -#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 - -/* Each 8-bit ATA register is aligned to a 4-bytes address */ -#define CONFIG_SYS_ATA_STRIDE 4 - -/* CONFIG_CMD_IDE requires some #defines for ATA registers */ -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS - -/* ATA registers base is at SATA controller base */ -#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000 - +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA_MV +#define CONFIG_LIBATA +#define CONFIG_LBA48 +#define CONFIG_EFI_PARTITION #define CONFIG_DOS_PARTITION -#endif /* CONFIG_CMD_IDE */ /* PCIe support */ #ifndef CONFIG_SPL_BUILD |