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| author | Simon Glass <sjg@chromium.org> | 2015-06-07 08:50:40 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-14 18:03:17 -0600 |
| commit | aec241dfb45e7763716c1cbc98942cb01a3a77fd (patch) | |
| tree | 1dccf1997219cdcd4bc565751ac5142113d235d3 /include | |
| parent | cdb6babec6422ad4b89e447b1b468f625deaea79 (diff) | |
| download | u-boot-imx-aec241dfb45e7763716c1cbc98942cb01a3a77fd.zip u-boot-imx-aec241dfb45e7763716c1cbc98942cb01a3a77fd.tar.gz u-boot-imx-aec241dfb45e7763716c1cbc98942cb01a3a77fd.tar.bz2 | |
dm: pci: Use the correct hose when configuring devices
Only the PCI controller has access to the PCI region information. Make sure
to use the controller (rather than any attached bridges) when configuring
devices.
This corrects a failure to scan and configure devices when driver model is
enabled for PCI.
Also add a comment to explain the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/pci.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h index 07b1e9a..3af511b 100644 --- a/include/pci.h +++ b/include/pci.h @@ -513,6 +513,16 @@ struct pci_controller { int indirect_type; + /* + * TODO(sjg@chromium.org): With driver model we use struct + * pci_controller for both the controller and any bridge devices + * attached to it. But there is only one region list and it is in the + * top-level controller. + * + * This could be changed so that struct pci_controller is only used + * for PCI controllers and a separate UCLASS (or perhaps + * UCLASS_PCI_GENERIC) is used for bridges. + */ struct pci_region regions[MAX_PCI_REGIONS]; int region_count; |