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| author | Marek Vasut <marex@denx.de> | 2015-07-09 03:41:53 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:09 +0200 |
| commit | 251faa2046c7680edebeb0114fb0a38b843cb7fd (patch) | |
| tree | e7f4e503572362e3e0df1c8b69119d453591214e /include | |
| parent | 7599b53dc1a1c89457a755858d4b6946e0e7fadd (diff) | |
| download | u-boot-imx-251faa2046c7680edebeb0114fb0a38b843cb7fd.zip u-boot-imx-251faa2046c7680edebeb0114fb0a38b843cb7fd.tar.gz u-boot-imx-251faa2046c7680edebeb0114fb0a38b843cb7fd.tar.bz2 | |
arm: socfpga: config: Zap incorrect config options
There is no need to disable support for partitions in the SPL,
we can support partitions in SPL perfectly well. This is likely
some remnant from old times, so just remove this configuration
option.
Moreover, the CRC32 chunk size doesn't have to be adjusted anymore,
since both the GD and malloc area are in RAM by the time this CRC
check can be used and there's plenty of space. Zap this abomination
as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_common.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 60a6025..b5d69d7 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -23,6 +23,8 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_CLOCKS +#define CONFIG_CRC32_VERIFY + #define CONFIG_FIT #define CONFIG_OF_LIBFDT #define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024) @@ -296,9 +298,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_MALLOC_SIMPLE #endif -#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */ -#define CONFIG_CRC32_VERIFY - #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_WATCHDOG_SUPPORT @@ -332,8 +331,4 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_PARTITIONS -#endif - #endif /* __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ */ |