Merge branch 'master' of git://git.denx.de/u-boot-arm

137 files changed, 2549 insertions, 1567 deletions

diff --git a/include/.gitignore b/include/.gitignore
index 7cd3e90..bf142fc 100644
--- a/include/.gitignore
+++ b/include/.gitignore
@@ -1,5 +1,4 @@
 /autoconf.mk*
-/asm
 /bmp_logo.h
 /bmp_logo_data.h
 /config.h
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 7e1eb4b..458952f 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -63,28 +63,16 @@ extern char __image_copy_end[];
 extern void _start(void);
 
 /*
- * ARM needs to use offsets for symbols, since the values of some symbols
- * are not resolved prior to relocation (and are just 0). Maybe this can be
- * resolved, or maybe other architectures are similar, iwc this should be
- * promoted to an architecture option.
+ * ARM defines its symbols as char[]. Other arches define them as ulongs.
  */
 #ifdef CONFIG_ARM
-#define CONFIG_SYS_SYM_OFFSETS
-#endif
-
-#ifdef CONFIG_SYS_SYM_OFFSETS
-/* Start/end of the relocation entries, as an offset from _start */
-extern ulong _rel_dyn_start_ofs;
-extern ulong _rel_dyn_end_ofs;
-
-/* End of the region to be relocated, as an offset form _start */
-extern ulong _image_copy_end_ofs;
 
-extern ulong _bss_start_ofs;	/* BSS start relative to _start */
-extern ulong _bss_end_ofs;		/* BSS end relative to _start */
-extern ulong _end_ofs;		/* end of image relative to _start */
-
-extern ulong _TEXT_BASE;	/* code start */
+extern char __bss_start[];
+extern char __bss_end[];
+extern char __image_copy_start[];
+extern char __image_copy_end[];
+extern char __rel_dyn_start[];
+extern char __rel_dyn_end[];
 
 #else /* don't use offsets: */
 
diff --git a/include/bitfield.h b/include/bitfield.h
new file mode 100644
index 0000000..ec4815c
--- /dev/null
+++ b/include/bitfield.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:      GPL-2.0+
+ */
+
+/*
+ * Bitfield operations
+ *
+ * These are generic bitfield operations which allow manipulation of variable
+ * width bitfields within a word. One use of this would be to use data tables
+ * to determine how to reprogram fields within R/W hardware registers.
+ *
+ * Example:
+ *
+ *            old_reg_val
+ * +--------+----+---+--+-----+----------+
+ * |        |    |   |  | old |          |
+ * +--------+----+---+--+-----+----------+
+ *
+ *            new_reg_val
+ * +--------+----+---+--+-----+----------+
+ * |        |    |   |  | new |          |
+ * +--------+----+---+--+-----+----------+
+ *
+ * mask = bitfield_mask(10, 5);
+ * old = bitfield_extract(old_reg_val, 10, 5);
+ * new_reg_val = bitfield_replace(old_reg_val, 10, 5, new);
+ *
+ * The numbers 10 and 5 could for example come from data
+ * tables which describe all bitfields in all registers.
+ */
+
+#include <linux/types.h>
+
+/* Produces a mask of set bits covering a range of a uint value */
+static inline uint bitfield_mask(uint shift, uint width)
+{
+	return ((1 << width) - 1) << shift;
+}
+
+/* Extract the value of a bitfield found within a given register value */
+static inline uint bitfield_extract(uint reg_val, uint shift, uint width)
+{
+	return (reg_val & bitfield_mask(shift, width)) >> shift;
+}
+
+/*
+ * Replace the value of a bitfield found within a given register value
+ * Returns the newly modified uint value with the replaced field.
+ */
+static inline uint bitfield_replace(uint reg_val, uint shift, uint width,
+				    uint bitfield_val)
+{
+	uint mask = bitfield_mask(shift, width);
+
+	return (reg_val & ~mask) | (bitfield_val << shift);
+}
diff --git a/include/clk.h b/include/clk.h
new file mode 100644
index 0000000..df4570c
--- /dev/null
+++ b/include/clk.h
@@ -0,0 +1,6 @@
+#ifndef _CLK_H_
+#define _CLK_H_
+
+int soc_clk_dump(void);
+
+#endif /* _CLK_H_ */
diff --git a/include/common.h b/include/common.h
index d5ebb25..96a45a6 100644
--- a/include/common.h
+++ b/include/common.h
@@ -302,9 +302,16 @@ int	checkdram     (void);
 int	last_stage_init(void);
 extern ulong monitor_flash_len;
 int mac_read_from_eeprom(void);
-extern u8 _binary_dt_dtb_start[];	/* embedded device tree blob */
+extern u8 __dtb_dt_begin[];	/* embedded device tree blob */
 int set_cpu_clk_info(void);
+#if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void);
+#else
+static inline int print_cpuinfo(void)
+{
+	return 0;
+}
+#endif
 int update_flash_size(int flash_size);
 
 /**
@@ -408,6 +415,9 @@ static inline int setenv_addr(const char *varname, const void *addr)
 #ifdef CONFIG_MIPS
 # include <asm/u-boot-mips.h>
 #endif /* CONFIG_MIPS */
+#ifdef CONFIG_ARC
+# include <asm/u-boot-arc.h>
+#endif /* CONFIG_ARC */
 
 #ifdef CONFIG_AUTO_COMPLETE
 int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf);
@@ -451,6 +461,7 @@ void	api_init (void);
 
 /* common/memsize.c */
 long	get_ram_size  (long *, long);
+phys_size_t get_effective_memsize(void);
 
 /* $(BOARD)/$(BOARD).c */
 void	reset_phy     (void);
@@ -961,6 +972,22 @@ static inline phys_addr_t map_to_sysmem(const void *ptr)
 #define DIV_ROUND_UP(n,d)	(((n) + (d) - 1) / (d))
 #define roundup(x, y)		((((x) + ((y) - 1)) / (y)) * (y))
 
+/*
+ * Divide positive or negative dividend by positive divisor and round
+ * to closest integer. Result is undefined for negative divisors and
+ * for negative dividends if the divisor variable type is unsigned.
+ */
+#define DIV_ROUND_CLOSEST(x, divisor)(			\
+{							\
+	typeof(x) __x = x;				\
+	typeof(divisor) __d = divisor;			\
+	(((typeof(x))-1) > 0 ||				\
+	 ((typeof(divisor))-1) > 0 || (__x) > 0) ?	\
+		(((__x) + ((__d) / 2)) / (__d)) :	\
+		(((__x) - ((__d) / 2)) / (__d));	\
+}							\
+)
+
 #define ALIGN(x,a)		__ALIGN_MASK((x),(typeof(x))(a)-1)
 #define __ALIGN_MASK(x,mask)	(((x)+(mask))&~(mask))
 
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index d847069..2c2a05b 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -23,6 +23,7 @@
 #define CONFIG_CMD_BSP		/* Board Specific functions	*/
 #define CONFIG_CMD_CACHE	/* icache, dcache		*/
 #define CONFIG_CMD_CDP		/* Cisco Discovery Protocol	*/
+#define CONFIG_CMD_CLK		/* Clock support		*/
 #define CONFIG_CMD_CONSOLE	/* coninfo			*/
 #define CONFIG_CMD_DATE		/* support for RTC, date/time...*/
 #define CONFIG_CMD_DHCP		/* DHCP Support			*/
@@ -37,7 +38,6 @@
 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
 #define CONFIG_CMD_FAT		/* FAT support			*/
 #define CONFIG_CMD_FDC		/* Floppy Disk Support		*/
-#define CONFIG_CMD_FDOS		/* Floppy DOS support		*/
 #define CONFIG_CMD_FLASH	/* flinfo, erase, protect	*/
 #define CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
 #define CONFIG_CMD_FUSE		/* Device fuse support		*/
diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h
new file mode 100644
index 0000000..5d18a4b
--- /dev/null
+++ b/include/config_distro_defaults.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2013-2014 Red Hat, Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CONFIG_CMD_DISTRO_DEFAULTS_H
+#define _CONFIG_CMD_DISTRO_DEFAULTS_H
+
+/*
+ * List of all commands and options that when defined enables support for
+ * features required by distros to support boards in a standardised and
+ * consitant manner.
+ */
+
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_PXE
+#define CONFIG_BOOTP_SUBNETMASK
+
+#if defined(__arm__)
+#define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
+#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)
+#define CONFIG_BOOTP_VCI_STRING         "U-boot.armv7"
+#else
+#define CONFIG_BOOTP_VCI_STRING         "U-boot.arm"
+#endif
+#endif
+
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_PXE
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_BOOTDELAY     2
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_MENU
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_SUPPORT_RAW_INITRD
+#define CONFIG_SYS_HUSH_PARSER
+
+#endif	/* _CONFIG_CMD_DISTRO_DEFAULTS_H */
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index de063b7..3d7dc1f 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE
-#define	CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 #endif
 
 /* Network configuration */
@@ -268,10 +267,8 @@
 /* End of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_SIZE	0x10000
 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	256
 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - \
-					CONFIG_SYS_GBL_DATA_SIZE) - 32)
+					GENERATED_GBL_DATA_SIZE) - 32)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 #define CONFIG_SYS_SBFHDR_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - 32)
 
diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h
index 3dcea0b..930699b 100644
--- a/include/configs/MERGERBOX.h
+++ b/include/configs/MERGERBOX.h
@@ -121,9 +121,8 @@
 #define CONFIG_SYS_INIT_RAM_LOCK	1
 #define CONFIG_SYS_INIT_RAM_ADDR	0xE6000000 /* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000 /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	0x100 /* num bytes initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE -\
-					 CONFIG_SYS_GBL_DATA_SIZE)
+					 GENERATED_GBL_DATA_SIZE)
 
 /*
  * Local Bus Configuration & Clock Setup
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 57bf04f..faa5495 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -24,7 +24,7 @@
 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
 #else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
 #define CONFIG_SYS_TEXT_BASE	0xf8f82000
 #endif /* CONFIG_NAND_SPL */
 #endif
@@ -42,7 +42,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef	CONFIG_RESET_VECTOR_ADDRESS
@@ -326,7 +326,7 @@
 
 /* NAND boot: 4K NAND loader config */
 #define CONFIG_SYS_NAND_SPL_SIZE	0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(CONFIG_SYS_INIT_L2_ADDR)
 #define CONFIG_SYS_NAND_U_BOOT_START \
 		(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
@@ -626,7 +626,7 @@
 #if defined(CONFIG_RAMBOOT_NAND)
 #define CONFIG_ENV_IS_IN_NAND	1
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
 #define CONFIG_ENV_RANGE	(3 * CONFIG_ENV_SIZE)
 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
 #define CONFIG_ENV_IS_IN_SPI_FLASH
@@ -649,11 +649,7 @@
 #endif
 #else
 	#define CONFIG_ENV_IS_IN_FLASH	1
-	#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-	#define CONFIG_ENV_ADDR		0xfff80000
-	#else
 	#define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-	#endif
 	#define CONFIG_ENV_SIZE		0x2000
 	#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 33cadb9..58b9c26 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -56,7 +56,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
 #else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
 #define CONFIG_SYS_TEXT_BASE	0xf8f82000
 #endif
 #endif
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index f457719..7b63945 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -24,7 +24,7 @@
 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
 #else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
 #define CONFIG_SYS_TEXT_BASE	0xf8f82000
 #endif /* CONFIG_NAND_SPL */
 #endif
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index f82fbca..eabfc85 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -21,19 +21,75 @@
 #define CONFIG_NAND_FSL_IFC
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_SDCARD
-#define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW                 /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE		0x11001000
+#define CONFIG_SPL_TEXT_BASE		0xD0001000
+#define CONFIG_SPL_PAD_TO		0x18000
+#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_MMC_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #ifdef CONFIG_SPIFLASH
+#ifdef CONFIG_SECURE_BOOT
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#else
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW         /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE			0x11001000
+#define CONFIG_SPL_TEXT_BASE			0xD0001000
+#define CONFIG_SPL_PAD_TO			0x18000
+#define CONFIG_SPL_MAX_SIZE			(96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
+#endif
 #endif
 
 #ifdef CONFIG_NAND
 #define CONFIG_SPL
+#ifdef CONFIG_SECURE_BOOT
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
@@ -51,8 +107,48 @@
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#else
+#define CONFIG_TPL
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_NAND_BOOT
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NAND_INIT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_COMMON_INIT_DDR
+#define CONFIG_SPL_MAX_SIZE		(128 << 10)
+#define CONFIG_SPL_TEXT_BASE		0xD0001000
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
+#elif defined(CONFIG_SPL_BUILD)
+#define CONFIG_SPL_INIT_MINIMAL
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TEXT_BASE		0xff800000
+#define CONFIG_SPL_MAX_SIZE		8192
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST	0xD0000000
+#define CONFIG_SYS_NAND_U_BOOT_START	0xD0000000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	(128 << 10)
+#endif
+#define CONFIG_SPL_PAD_TO	0x20000
+#define CONFIG_TPL_PAD_TO	0x20000
+#define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
+#define CONFIG_SYS_TEXT_BASE	0x11001000
+#define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#endif
 #endif
-
 
 #ifdef CONFIG_NAND_SECBOOT	/* NAND Boot */
 #define CONFIG_RAMBOOT_NAND
@@ -473,6 +569,43 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024) /* Reserve 256 kB for Mon*/
 #define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)	/* Reserved for malloc*/
 
+/*
+ * Config the L2 Cache as L2 SRAM
+ */
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+#define CONFIG_SYS_INIT_L2_ADDR		0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE	0xD0001000
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE	(16 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(128 << 10)
+#define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
+#elif defined(CONFIG_NAND)
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_INIT_L2_ADDR		0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE	0xD0001000
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(48 << 10)
+#define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
+#else
+#define CONFIG_SYS_INIT_L2_ADDR		0xD0000000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_L2_SIZE		(256 << 10)
+#define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE	(CONFIG_SYS_INIT_L2_END - 0x3000)
+#define CONFIG_SPL_RELOC_STACK		((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
+#endif
+#endif
+#endif
+
 /* Serial Port */
 #define CONFIG_CONS_INDEX	1
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
@@ -480,7 +613,7 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 #define CONFIG_NS16550_MIN_FUNCTIONS
 #endif
 
@@ -637,12 +770,12 @@ extern unsigned long get_sdram_size(void);
 /*
  * Environment
  */
-#if defined(CONFIG_RAMBOOT_SDCARD)
+#if defined(CONFIG_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_FSL_FIXED_MMC_LOCATION
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x2000
-#elif defined(CONFIG_RAMBOOT_SPIFLASH)
+#elif defined(CONFIG_SPIFLASH)
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_BUS	0
 #define CONFIG_ENV_SPI_CS	0
@@ -653,6 +786,10 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_ENV_SIZE		0x2000
 #elif defined(CONFIG_NAND)
 #define CONFIG_ENV_IS_IN_NAND
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
+#else
 #if defined(CONFIG_P1010RDB_PA)
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
 #define CONFIG_ENV_RANGE	(3 * CONFIG_ENV_SIZE) /* 3*16=48K for env */
@@ -660,7 +797,8 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_ENV_SIZE		(16 * 1024)
 #define CONFIG_ENV_RANGE	(32 * CONFIG_ENV_SIZE) /* new block size 512K */
 #endif
-#define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#endif
+#define CONFIG_ENV_OFFSET	(1024 * 1024)
 #elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE		/* Store ENV in memory only */
 #define CONFIG_ENV_ADDR			(CONFIG_SYS_MONITOR_BASE - 0x1000)
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 6255b0a..139d4fe 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -30,12 +30,12 @@
 #define CONFIG_FSL_LAW			/* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
 #define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_MMC_BOOT
@@ -60,12 +60,12 @@
 #define CONFIG_FSL_LAW		/* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_SPI_BOOT
@@ -365,10 +365,10 @@
 #define CONFIG_SYS_L2_SIZE		(256 << 10)
 #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
 #define CONFIG_SPL_RELOC_TEXT_BASE	0xf8f81000
-#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
 #define CONFIG_SPL_RELOC_STACK_SIZE	(32 << 10)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE	(96 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(108 << 10)
 #define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
 #elif defined(CONFIG_NAND)
 #ifdef CONFIG_TPL_BUILD
diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h
index b513545..2ffa354 100644
--- a/include/configs/P1023RDS.h
+++ b/include/configs/P1023RDS.h
@@ -26,7 +26,7 @@
 #ifdef CONFIG_NAND_SPL
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
 #else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
 #endif /* CONFIG_NAND_SPL */
 #endif
@@ -194,9 +194,8 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_INIT_RAM_ADDR	0xffd00000	/* Initial L1 address */
 #define CONFIG_SYS_INIT_RAM_END	0x00004000	/* End of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* num bytes initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	\
-	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024) /* Reserve 256 kB for Mon */
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 32ed0c2..2ffaf5c 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -38,7 +38,7 @@
 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
 #else
-#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
+#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
 #define CONFIG_SYS_TEXT_BASE		0xf8f82000
 #endif /* CONFIG_NAND_SPL */
 #endif
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 8234a82..da6e760 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -611,9 +611,8 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_FMAN_ENET
-#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	0x10
-#define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR	0x11
-#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	4
+#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	0x01
+#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	0x02
 
 #define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR    0x1c
 #define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR    0x1d
@@ -670,7 +669,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS	16		/* max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks*/
 
 /*
  * For booting Linux, the board info and command line data
diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index 5e988c2..fd010c0 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -79,10 +79,6 @@
 #if defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -202,6 +198,7 @@
 /* CPLD on IFC */
 #define CONFIG_SYS_CPLD_BASE	0xffdf0000
 #define CONFIG_SYS_CPLD_BASE_PHYS	(0xf00000000ull | CONFIG_SYS_CPLD_BASE)
+#define CONFIG_SYS_CSPR2_EXT	(0xf)
 #define CONFIG_SYS_CSPR2	(CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
 				| CSPR_PORT_SIZE_8 \
 				| CSPR_MSEL_GPCM \
@@ -386,6 +383,10 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
+#define CONFIG_ENV_SPI_BUS              0
+#define CONFIG_ENV_SPI_CS               0
+#define CONFIG_ENV_SPI_MAX_HZ           10000000
+#define CONFIG_ENV_SPI_MODE             0
 
 /*
  * General PCI
@@ -543,13 +544,12 @@
 #endif
 
 #ifdef CONFIG_FMAN_ENET
-#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR    0x1c
-#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR    0x1d
-#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR    0x1e
-#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR    0x1f
+#define CONFIG_SYS_SGMII1_PHY_ADDR		0x03
+#define CONFIG_SYS_RGMII1_PHY_ADDR		0x01
+#define CONFIG_SYS_RGMII2_PHY_ADDR		0x02
 
 #define CONFIG_MII		/* MII PHY management */
-#define CONFIG_ETHPRIME		"FM1@DTSEC1"
+#define CONFIG_ETHPRIME		"FM1@DTSEC4"
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif
 
@@ -596,7 +596,6 @@
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS	16		/* max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks*/
 
 /*
  * For booting Linux, the board info and command line data
@@ -627,9 +626,9 @@
 #define __USB_PHY_TYPE	utmi
 
 #define	CONFIG_EXTRA_ENV_SETTINGS				\
-	"hwconfig=fsl_ddr:ctlr_intlv=cacheline,"		\
-	"bank_intlv=cs0_cs1;"					\
-	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+	"hwconfig=fsl_ddr:bank_intlv=cs0_cs1;"			\
+	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
+	"usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
 	"netdev=eth0\0"						\
 	"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"		\
 	"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"	\
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index aafa813..6d07805 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -79,10 +79,6 @@
 #if defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -202,6 +198,7 @@
 /* CPLD on IFC */
 #define CONFIG_SYS_CPLD_BASE	0xffdf0000
 #define CONFIG_SYS_CPLD_BASE_PHYS	(0xf00000000ull | CONFIG_SYS_CPLD_BASE)
+#define CONFIG_SYS_CSPR2_EXT	(0xf)
 #define CONFIG_SYS_CSPR2	(CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
 				| CSPR_PORT_SIZE_8 \
 				| CSPR_MSEL_GPCM \
@@ -394,6 +391,10 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
+#define CONFIG_ENV_SPI_BUS              0
+#define CONFIG_ENV_SPI_CS               0
+#define CONFIG_ENV_SPI_MAX_HZ           10000000
+#define CONFIG_ENV_SPI_MODE             0
 
 /*
  * General PCI
@@ -551,8 +552,11 @@
 #endif
 
 #ifdef CONFIG_FMAN_ENET
+#define CONFIG_SYS_RGMII1_PHY_ADDR		0x01
+#define CONFIG_SYS_RGMII2_PHY_ADDR		0x02
+
 #define CONFIG_MII		/* MII PHY management */
-#define CONFIG_ETHPRIME		"FM1@DTSEC1"
+#define CONFIG_ETHPRIME		"FM1@DTSEC4"
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif
 
@@ -600,7 +604,6 @@
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS	16		/* max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks*/
 
 /*
  * For booting Linux, the board info and command line data
@@ -631,9 +634,9 @@
 #define __USB_PHY_TYPE	utmi
 
 #define	CONFIG_EXTRA_ENV_SETTINGS				\
-	"hwconfig=fsl_ddr:ctlr_intlv=cacheline,"		\
-	"bank_intlv=cs0_cs1;"					\
-	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+	"hwconfig=fsl_ddr:bank_intlv=cs0_cs1;"			\
+	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
+	"usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
 	"netdev=eth0\0"						\
 	"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"		\
 	"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"	\
diff --git a/include/configs/T2080QDS.h b/include/configs/T208xQDS.h
index 9bd0fe2..5b22d64 100644
--- a/include/configs/T2080QDS.h
+++ b/include/configs/T208xQDS.h
@@ -5,21 +5,25 @@
  */
 
 /*
- * T2080 QDS board configuration file
+ * T2080/T2081 QDS board configuration file
  */
 
-#ifndef __T2080QDS_H
-#define __T2080QDS_H
+#ifndef __T208xQDS_H
+#define __T208xQDS_H
 
-#define CONFIG_T2080QDS
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 #define CONFIG_MMC
 #define CONFIG_SPI_FLASH
 #define CONFIG_USB_EHCI
+#if defined(CONFIG_PPC_T2080)
+#define CONFIG_T2080QDS
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_SYS_SRIO		/* Enable Serial RapidIO Support */
 #define CONFIG_SRIO1		/* SRIO port 1 */
 #define CONFIG_SRIO2		/* SRIO port 2 */
+#elif defined(CONFIG_PPC_T2081)
+#define CONFIG_T2081QDS
+#endif
 
 /* High Level Configuration Options */
 #define CONFIG_PHYS_64BIT
@@ -44,8 +48,12 @@
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS	0xfffffffc
-#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg
-#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg
+#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xqds/t208x_pbi.cfg
+#if defined(CONFIG_PPC_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2080_rcw.cfg
+#elif defined(CONFIG_PPC_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2081_rcw.cfg
+#endif
 #endif
 
 #define CONFIG_SRIO_PCIE_BOOT_MASTER
@@ -447,7 +455,12 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_FSL_ESPI
 #define CONFIG_SPI_FLASH_SST
 #define CONFIG_SPI_FLASH_STMICRO
+#if defined(CONFIG_T2080QDS)
 #define CONFIG_SPI_FLASH_SPANSION
+#elif defined(CONFIG_T2081QDS)
+#define CONFIG_SPI_FLASH_EON
+#endif
+
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED	 10000000
 #define CONFIG_SF_DEFAULT_MODE	  0
@@ -505,7 +518,7 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_PCIE_RESET           /* need PCIe reset errata LSZ ADD */
+#define CONFIG_FSL_PCIE_RESET	   /* need PCIe reset errata */
 #define CONFIG_NET_MULTI
 #define CONFIG_E1000
 #define CONFIG_PCI_PNP		/* do pci plug-and-play */
@@ -680,7 +693,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ		1000	/* decrementer freq: 1ms ticks*/
 
 /*
  * For booting Linux, the board info and command line data
@@ -801,4 +813,4 @@ unsigned long get_board_ddr_clk(void);
 #undef CONFIG_CMD_USB
 #endif
 
-#endif	/* __T2080QDS_H */
+#endif	/* __T208xQDS_H */
diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h
index aa584b7..f57820d 100644
--- a/include/configs/ac14xx.h
+++ b/include/configs/ac14xx.h
@@ -289,9 +289,8 @@
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SRAM_BASE
 #define CONFIG_SYS_INIT_RAM_END		CONFIG_SYS_SRAM_SIZE
 
-#define CONFIG_SYS_GBL_DATA_SIZE	0x100
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
-					 CONFIG_SYS_GBL_DATA_SIZE)
+					 GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/actux1.h b/include/configs/actux1.h
deleted file mode 100644
index 9b8bd78..0000000
--- a/include/configs/actux1.h
+++ /dev/null
@@ -1,226 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the AcTux-1 board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425			1
-#define CONFIG_ACTUX1			1
-
-#define	CONFIG_MACH_TYPE		1479
-
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTDELAY		3
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F	1
-#define CONFIG_SYS_LDSCRIPT	"board/actux1/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#define CONFIG_PCI_PNP
-#define CONFIG_IXP_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI_ENUM
-#endif
-
-#define CONFIG_BOOTCOMMAND		"run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-#define CONFIG_REVISION_TAG		1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE		230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE			256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS			16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START		0x00400000
-#define CONFIG_SYS_MEMTEST_END			0x00800000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK                 66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR			0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600,	\
-					  115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE	1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0			0xbd113842
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_SDRAM_BASE			0x00000000
-
-#ifdef CONFIG_RAM_32MB
-# define CONFIG_SYS_SDR_CONFIG			0x18
-# define PHYS_SDRAM_1_SIZE		0x02000000
-# define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
-# define CONFIG_SYS_SDR_MODE_CONFIG		0x1
-# define CONFIG_SYS_DRAM_SIZE			0x02000000
-#else /* 16MB SDRAM */
-# define CONFIG_SYS_SDR_CONFIG			0x3A
-# define PHYS_SDRAM_1_SIZE		0x01000000
-# define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
-# define CONFIG_SYS_SDR_MODE_CONFIG		0x1
-# define CONFIG_SYS_DRAM_SIZE			0x01000000
-#endif
-
-/* FLASH organization */
-#define CONFIG_SYS_TEXT_BASE		0x50000000
-#ifdef CONFIG_FLASH2X2
-# define CONFIG_SYS_MAX_FLASH_BANKS		2
-/* max number of sectors on one chip */
-# define CONFIG_SYS_MAX_FLASH_SECT		40
-# define PHYS_FLASH_1			0x50000000
-# define PHYS_FLASH_2			0x50200000
-# define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1, PHYS_FLASH_2 }
-#endif
-#ifdef CONFIG_FLASH1X8
-# define CONFIG_SYS_MAX_FLASH_BANKS		1
-/* max number of sectors on one chip */
-# define CONFIG_SYS_MAX_FLASH_SECT		140
-# define PHYS_FLASH_1			0x50000000
-# define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }
-#endif
-
-#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT			262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE		1
-/* NPE0 PHY address */
-#define	CONFIG_PHY_ADDR			0
-/* NPE1 PHY address (HW Release E only) */
-#define	CONFIG_PHY1_ADDR		1
-/* MII PHY management */
-#define CONFIG_MII			1
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER		16
-#define CONFIG_RESET_PHY_R		1
-
-#define CONFIG_HAS_ETH1			1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE		32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define	CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV			1
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"npe_ucode=50040000\0"						\
-	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
-	"kerneladdr=50050000\0"						\
-	"kernelfile=actux1/uImage\0"					\
-	"rootfile=actux1/rootfs\0"					\
-	"rootaddr=50170000\0"						\
-	"loadaddr=10000\0"						\
-	"updateboot_ser=mw.b 10000 ff 40000;"				\
-	" loady ${loadaddr};"						\
-	" run eraseboot writeboot\0"					\
-	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} actux1/u-boot.bin;"				\
-	" run eraseboot writeboot\0"					\
-	"eraseboot=protect off 50000000 50003fff;"			\
-	" protect off 50006000 5003ffff;"				\
-	" erase 50000000 50003fff;"					\
-	" erase 50006000 5003ffff\0"					\
-	"writeboot=cp.b 10000 50000000 4000;"				\
-	" cp.b 16000 50006000 3a000\0"					\
-	"updateucode=loady;"						\
-	" era ${npe_ucode} +${filesize};"				\
-	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
-	"updateroot=tftp ${loadaddr} ${rootfile};"			\
-	" era ${rootaddr} +${filesize};"				\
-	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
-	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
-	" era ${kerneladdr} +${filesize};"				\
-	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
-	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
-	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
-	"boot_flash=run flashargs addtty addeth;"			\
-	" bootm ${kerneladdr}\0"					\
-	"boot_net=run netargs addtty addeth;"				\
-	" tftpboot ${loadaddr} ${kernelfile};"				\
-	" bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR						\
-	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/actux2.h b/include/configs/actux2.h
deleted file mode 100644
index f0cbff7..0000000
--- a/include/configs/actux2.h
+++ /dev/null
@@ -1,206 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the AcTux-2 board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425			1
-#define CONFIG_ACTUX2			1
-
-#define	CONFIG_MACH_TYPE		1480
-
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTDELAY		5
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F	1
-#define CONFIG_SYS_LDSCRIPT	"board/actux2/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-#undef CONFIG_CMD_PCI
-#undef CONFIG_PCI
-
-#define CONFIG_BOOTCOMMAND		"run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-#define CONFIG_REVISION_TAG		1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE		230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE			256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS			16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START		0x00400000
-#define CONFIG_SYS_MEMTEST_END			0x00800000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK                 66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR			0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, \
-					  115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE	1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0			0xbd113042
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_SDRAM_BASE			0x00000000
-
-/* 16MB SDRAM */
-#define CONFIG_SYS_SDR_CONFIG			0x3A
-#define PHYS_SDRAM_1_SIZE		0x01000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
-#define CONFIG_SYS_SDR_MODE_CONFIG		0x1
-#define CONFIG_SYS_DRAM_SIZE			0x01000000
-
-/* FLASH organization */
-#define CONFIG_SYS_TEXT_BASE		0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS		1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT		140
-#define PHYS_FLASH_1			0x50000000
-#define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }
-
-#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT			262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE		1
-/* NPE0 PHY address */
-#define	CONFIG_PHY_ADDR			0x00
-/* MII PHY management */
-#define CONFIG_MII			1
-/* fixed-speed switch without standard PHY registers on MII */
-#define CONFIG_MII_NPE0_FIXEDLINK       1
-#define CONFIG_MII_NPE0_SPEED           100
-#define CONFIG_MII_NPE0_FULLDUPLEX      1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER		16
-#define CONFIG_RESET_PHY_R		1
-/* ethernet switch connected to MII port */
-#define CONFIG_MII_ETHSWITCH		1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE		32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define	CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV			1
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"npe_ucode=50040000\0"						\
-	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
-	"kerneladdr=50050000\0"						\
-	"kernelfile=actux2/uImage\0"					\
-	"rootfile=actux2/rootfs\0"					\
-	"rootaddr=50170000\0"						\
-	"loadaddr=10000\0"						\
-	"updateboot_ser=mw.b 10000 ff 40000;"				\
-	" loady ${loadaddr};"						\
-	" run eraseboot writeboot\0"					\
-	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} actux2/u-boot.bin;"				\
-	" run eraseboot writeboot\0"					\
-	"eraseboot=protect off 50000000 50003fff;"			\
-	" protect off 50006000 5003ffff;"				\
-	" erase 50000000 50003fff;"					\
-	" erase 50006000 5003ffff\0"					\
-	"writeboot=cp.b 10000 50000000 4000;"				\
-	" cp.b 16000 50006000 3a000\0"					\
-	"updateucode=loady;"						\
-	" era ${npe_ucode} +${filesize};"				\
-	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
-	"updateroot=tftp ${loadaddr} ${rootfile};"			\
-	" era ${rootaddr} +${filesize};"				\
-	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
-	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
-	" era ${kerneladdr} +${filesize};"				\
-	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
-	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
-	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
-	"boot_flash=run flashargs addtty addeth;"			\
-	" bootm ${kerneladdr}\0"					\
-	"boot_net=run netargs addtty addeth;"				\
-	" tftpboot ${loadaddr} ${kernelfile};"				\
-	" bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR						\
-	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/actux3.h b/include/configs/actux3.h
deleted file mode 100644
index 7639107..0000000
--- a/include/configs/actux3.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the AcTux-3 board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425			1
-#define CONFIG_ACTUX3			1
-
-#define	CONFIG_MACH_TYPE		1481
-
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTDELAY		3
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F	1
-#define CONFIG_SYS_LDSCRIPT	"board/actux3/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-
-#define CONFIG_BOOTCOMMAND		"run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-#define CONFIG_REVISION_TAG		1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE		230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE			256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS			16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START		0x00400000
-#define CONFIG_SYS_MEMTEST_END			0x00800000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK                 66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR			0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, \
-					  115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE	1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0			0xbd113442
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_SDRAM_BASE			0x00000000
-
-/* 16MB SDRAM */
-#define CONFIG_SYS_SDR_CONFIG			0x3A
-#define PHYS_SDRAM_1_SIZE		0x01000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
-#define CONFIG_SYS_SDR_MODE_CONFIG		0x1
-#define CONFIG_SYS_DRAM_SIZE			0x01000000
-
-/* FLASH organization */
-#define CONFIG_SYS_TEXT_BASE		0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS		1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT		140
-#define PHYS_FLASH_1			0x50000000
-#define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }
-
-#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT			262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE		1
-
-/* NPE0 PHY address */
-#define	CONFIG_PHY_ADDR			0x10
-/* MII PHY management */
-#define CONFIG_MII			1
-/* fixed-speed switch without standard PHY registers on MII */
-#define CONFIG_MII_NPE0_FIXEDLINK       1
-#define CONFIG_MII_NPE0_SPEED           100
-#define CONFIG_MII_NPE0_FULLDUPLEX      1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER		16
-#define CONFIG_RESET_PHY_R		1
-/* ethernet switch connected to MII port */
-#define CONFIG_MII_ETHSWITCH		1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE		32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define	CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV			1
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"npe_ucode=50040000\0"						\
-	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
-	"kerneladdr=50050000\0"						\
-	"kernelfile=actux3/uImage\0"					\
-	"rootfile=actux3/rootfs\0"					\
-	"rootaddr=50170000\0"						\
-	"loadaddr=10000\0"						\
-	"updateboot_ser=mw.b 10000 ff 40000;"				\
-	" loady ${loadaddr};"						\
-	" run eraseboot writeboot\0"					\
-	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} actux3/u-boot.bin;"				\
-	" run eraseboot writeboot\0"					\
-	"eraseboot=protect off 50000000 50003fff;"			\
-	" protect off 50006000 5003ffff;"				\
-	" erase 50000000 50003fff;"					\
-	" erase 50006000 5003ffff\0"					\
-	"writeboot=cp.b 10000 50000000 4000;"				\
-	" cp.b 16000 50006000 3a000\0"					\
-	"updateucode=loady;"						\
-	" era ${npe_ucode} +${filesize};"				\
-	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
-	"updateroot=tftp ${loadaddr} ${rootfile};"			\
-	" era ${rootaddr} +${filesize};"				\
-	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
-	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
-	" era ${kerneladdr} +${filesize};"				\
-	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
-	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
-	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
-	"boot_flash=run flashargs addtty addeth;"			\
-	" bootm ${kerneladdr}\0"					\
-	"boot_net=run netargs addtty addeth;"				\
-	" tftpboot ${loadaddr} ${kernelfile};"				\
-	" bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR						\
-	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/actux4.h b/include/configs/actux4.h
deleted file mode 100644
index 12bd98a..0000000
--- a/include/configs/actux4.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the AcTux-4 board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425			1
-#define CONFIG_ACTUX4			1
-
-#define	CONFIG_MACH_TYPE		1532
-
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART1
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTDELAY		3
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F	1
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-
-#define CONFIG_PCI
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#define CONFIG_PCI_PNP
-#define CONFIG_IXP_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI_ENUM
-#endif
-
-#define CONFIG_BOOTCOMMAND		"run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE		230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE			256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS			16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START		0x00400000
-#define CONFIG_SYS_MEMTEST_END			0x00800000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK                 66000000
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR			0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, \
-					  115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE	1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0			0xbd113003
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_SDRAM_BASE			0x00000000
-
-/* 32MB SDRAM */
-#define CONFIG_SYS_SDR_CONFIG			0x18
-#define PHYS_SDRAM_1_SIZE		0x02000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
-#define CONFIG_SYS_SDR_MODE_CONFIG		0x1
-#define CONFIG_SYS_DRAM_SIZE			0x02000000
-
-/* FLASH organization */
-#define CONFIG_SYS_TEXT_BASE		0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS		2
-/* max # of sectors per chip */
-#define CONFIG_SYS_MAX_FLASH_SECT		70
-#define PHYS_FLASH_1			0x50000000
-#define PHYS_FLASH_2			0x51000000
-#define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1, PHYS_FLASH_2 }
-
-#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN			(252 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT			258048
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* board provides its own flash_init code */
-#define CONFIG_FLASH_CFI_LEGACY		1
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT
-/* SST 39VF020 etc. support */
-#define CONFIG_SYS_FLASH_LEGACY_256Kx8	1
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE		1
-
-/* NPE0 PHY address */
-#define	CONFIG_PHY_ADDR			0x1C
-/* MII PHY management */
-#define CONFIG_MII			1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER		16
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE		32
-
-/* environment organization: one complete 4k flash sector */
-#define	CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_SIZE			0x1000
-#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x3f000)
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"npe_ucode=51000000\0"						\
-	"mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);"			\
-	"IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0"		\
-	"kerneladdr=51020000\0"						\
-	"kernelfile=actux4/uImage\0"					\
-	"rootfile=actux4/rootfs\0"					\
-	"rootaddr=51160000\0"						\
-	"loadaddr=10000\0"						\
-	"updateboot_ser=mw.b 10000 ff 40000;"				\
-	" loady ${loadaddr};"						\
-	" run eraseboot writeboot\0"					\
-	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} actux4/u-boot.bin;"					\
-	" run eraseboot writeboot\0"					\
-	"eraseboot=protect off 50000000 5003efff;"			\
-	" erase 50000000 +${filesize}\0"				\
-	"writeboot=cp.b 10000 50000000 ${filesize}\0"			\
-	"updateucode=loady;"						\
-	" era ${npe_ucode} +${filesize};"				\
-	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
-	"updateroot=tftp ${loadaddr} ${rootfile};"			\
-	" era ${rootaddr} +${filesize};"				\
-	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
-	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
-	" era ${kerneladdr} +${filesize};"				\
-	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
-	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
-	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
-	"boot_flash=run flashargs addtty addeth;"			\
-	" bootm ${kerneladdr}\0"					\
-	"boot_net=run netargs addtty addeth;"				\
-	" tftpboot ${loadaddr} ${kernelfile};"				\
-	" bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR						\
-	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h
index e31131f..e318c75 100644
--- a/include/configs/adp-ag101.h
+++ b/include/configs/adp-ag101.h
@@ -139,11 +139,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(512 << 10)
 
 /*
- * size in bytes reserved for initial data
- */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-
-/*
  * AHB Controller configuration
  */
 #define CONFIG_FTAHBC020S
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index ded3f33..24904b0 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -139,11 +139,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(512 << 10)
 
 /*
- * size in bytes reserved for initial data
- */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-
-/*
  * AHB Controller configuration
  */
 #define CONFIG_FTAHBC020S
diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h
index 1e4ce2e..39f7a3c 100644
--- a/include/configs/adp-ag102.h
+++ b/include/configs/adp-ag102.h
@@ -204,11 +204,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
 
 /*
- * size in bytes reserved for initial data
-*/
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-
-/*
  * AHB Controller configuration
  */
 #define CONFIG_FTAHBC020S
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 73a9adb..23c056c 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -20,6 +20,7 @@
 
 #define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
 #define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
+#define CONFIG_BOARD_LATE_INIT
 
 /* Clock Defines */
 #define V_OSCK				24000000  /* Clock output from T2 */
@@ -31,6 +32,12 @@
 /* Always 128 KiB env size */
 #define CONFIG_ENV_SIZE			(128 << 10)
 
+/* Enhance our eMMC support / experience. */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
 #ifdef CONFIG_NAND
 #define NANDARGS \
 	"mtdids=" MTDIDS_DEFAULT "\0" \
@@ -64,6 +71,9 @@
 	"bootfile=zImage\0" \
 	"fdtfile=undefined\0" \
 	"console=ttyO0,115200n8\0" \
+	"partitions=" \
+		"uuid_disk=${uuid_gpt_disk};" \
+		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
 	"optargs=\0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 ro\0" \
@@ -295,6 +305,9 @@
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
 /* disable host part of MUSB in SPL */
 #undef CONFIG_MUSB_HOST
+/* disable EFI partitions and partition UUID support */
+#undef CONFIG_PARTITION_UUIDS
+#undef CONFIG_EFI_PARTITION
 /*
  * Disable CPSW SPL support so we fit within the 101KiB limit.
  */
@@ -385,7 +398,6 @@
 /* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h
index 115d1b3..e72ee05 100644
--- a/include/configs/am335x_igep0033.h
+++ b/include/configs/am335x_igep0033.h
@@ -181,7 +181,6 @@
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_NET_MULTI
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index d3c4756..614857d 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -84,6 +84,32 @@
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
 
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_QSPI_SEL_GPIO                   48
+#define CONFIG_SF_DEFAULT_SPEED                48000000
+#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS             0
+#define CONFIG_SPL_SPI_CS              0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
+/* Enhance our eMMC support / experience. */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x80200000\0" \
@@ -95,6 +121,9 @@
 	"bootdir=/boot\0" \
 	"bootfile=zImage\0" \
 	"console=ttyO0,115200n8\0" \
+	"partitions=" \
+		"uuid_disk=${uuid_gpt_disk};" \
+		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
 	"optargs=\0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 rw\0" \
@@ -176,4 +205,30 @@
 	"run usbboot;"
 
 #endif
+
+/* CPSW Ethernet */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT		10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING	"AM43xx U-Boot SPL"
+
+#define CONFIG_SPL_ETH_SUPPORT
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SYS_RX_ETH_BUFFER	64
+
 #endif	/* __CONFIG_AM43XX_EVM_H */
diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h
index bb39491..4282d70 100644
--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@@ -134,8 +134,6 @@
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
 
 /* ENV setting */
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 1193013..b10c48c 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -356,11 +356,6 @@
 #endif /* CONFIG_CMD_DATE */
 
 /*
- * Clocks
- */
-#define	CONFIG_SYS_HZ			1000	/* Ticks per second */
-
-/*
  * PLL
  *
  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h
new file mode 100644
index 0000000..88d27db
--- /dev/null
+++ b/include/configs/arcangel4-be.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _CONFIG_ARCANGEL4_H_
+#define _CONFIG_ARCANGEL4_H_
+
+/*
+ *  CPU configuration
+ */
+#define CONFIG_SYS_BIG_ENDIAN
+#define CONFIG_ARC700
+#define CONFIG_ARC_MMU_VER		3
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_SYS_CLK_FREQ		70000000
+#define CONFIG_SYS_TIMER_RATE		CONFIG_SYS_CLK_FREQ
+
+/*
+ * Board configuration
+ */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is in RAM already */
+
+#define CONFIG_ARCH_EARLY_INIT_R
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE		0x81000000
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_SYS_SDRAM_SIZE		0x10000000	/* 256 Mb */
+
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN		0x200000	/* 2 MB */
+#define CONFIG_SYS_BOOTM_LEN		0x2000000	/* 32 MB */
+#define CONFIG_SYS_LOAD_ADDR		0x82000000
+
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * UART configuration
+ *
+ */
+#define CONFIG_ARC_SERIAL
+#define CONFIG_ARC_UART_BASE		0xC0FC1000
+#define CONFIG_BAUDRATE			115200
+
+/*
+ * Command line configuration
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_MAXARGS		16
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			0x00200		/* 512 bytes */
+#define CONFIG_ENV_OFFSET		0
+
+/*
+ * Environment configuration
+ */
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTFILE			"uImage"
+#define CONFIG_BOOTARGS			"console=ttyARC0,115200n8"
+#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
+
+/*
+ * Console configuration
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"arcangel4# "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+						sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#endif /* _CONFIG_ARCANGEL4_H_ */
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
new file mode 100644
index 0000000..4579eb9
--- /dev/null
+++ b/include/configs/arcangel4.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _CONFIG_ARCANGEL4_H_
+#define _CONFIG_ARCANGEL4_H_
+
+/*
+ *  CPU configuration
+ */
+#define CONFIG_ARC700
+#define CONFIG_ARC_MMU_VER		3
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_SYS_CLK_FREQ		70000000
+#define CONFIG_SYS_TIMER_RATE		CONFIG_SYS_CLK_FREQ
+
+/*
+ * Board configuration
+ */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is in RAM already */
+
+#define CONFIG_ARCH_EARLY_INIT_R
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE		0x81000000
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_SYS_SDRAM_SIZE		0x10000000	/* 256 Mb */
+
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN		0x200000	/* 2 MB */
+#define CONFIG_SYS_BOOTM_LEN		0x2000000	/* 32 MB */
+#define CONFIG_SYS_LOAD_ADDR		0x82000000
+
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * UART configuration
+ *
+ */
+#define CONFIG_ARC_SERIAL
+#define CONFIG_ARC_UART_BASE		0xC0FC1000
+#define CONFIG_BAUDRATE			115200
+
+/*
+ * Command line configuration
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_MAXARGS		16
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			0x00200		/* 512 bytes */
+#define CONFIG_ENV_OFFSET		0
+
+/*
+ * Environment configuration
+ */
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTFILE			"uImage"
+#define CONFIG_BOOTARGS			"console=ttyARC0,115200n8"
+#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
+
+/*
+ * Console configuration
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"arcangel4# "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+						sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#endif /* _CONFIG_ARCANGEL4_H_ */
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index e5569c7..17a2da0 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -94,7 +94,6 @@
 #define CONFIG_SYS_MONITOR_BASE		0x00000000
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
 #define CONFIG_SYS_TEXT_BASE	0xE80C0000
 
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index 9584d82..515facf 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -22,8 +22,6 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-/* Enable fdt support for Exynos5250 */
-#define CONFIG_ARCH_DEVICE_TREE		exynos5250
 #define CONFIG_OF_CONTROL
 #define CONFIG_OF_SEPARATE
 
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
new file mode 100644
index 0000000..f6b569a
--- /dev/null
+++ b/include/configs/axs101.h
@@ -0,0 +1,181 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _CONFIG_AXS101_H_
+#define _CONFIG_AXS101_H_
+
+/*
+ *  CPU configuration
+ */
+#define CONFIG_ARC700
+#define CONFIG_ARC_MMU_VER		3
+#define CONFIG_SYS_CACHELINE_SIZE	32
+#define CONFIG_SYS_CLK_FREQ		750000000
+#define CONFIG_SYS_TIMER_RATE		CONFIG_SYS_CLK_FREQ
+
+/* dwgmac doesn't work with D$ enabled now */
+#define CONFIG_SYS_DCACHE_OFF
+
+/*
+ * Board configuration
+ */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is in RAM already */
+
+#define CONFIG_ARCH_EARLY_INIT_R
+
+#define ARC_FPGA_PERIPHERAL_BASE	0xE0000000
+#define ARC_APB_PERIPHERAL_BASE		0xF0000000
+#define ARC_DWMMC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x15000)
+#define ARC_DWGMAC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x18000)
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE		0x81000000
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
+#define CONFIG_SYS_SDRAM_SIZE		0x10000000	/* 256 Mb */
+
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN		0x200000	/* 2 MB */
+#define CONFIG_SYS_BOOTM_LEN		0x2000000	/* 32 MB */
+#define CONFIG_SYS_LOAD_ADDR		0x82000000
+
+/*
+ * NAND Flash configuration
+ */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_NAND_BASE		(ARC_FPGA_PERIPHERAL_BASE + 0x16000)
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+
+/*
+ * UART configuration
+ *
+ * CONFIG_CONS_INDEX = 1 - Debug UART
+ * CONFIG_CONS_INDEX = 4 - FPGA UART connected to FTDI/USB
+ */
+#define CONFIG_CONS_INDEX		4
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#if (CONFIG_CONS_INDEX == 1)
+	/* Debug UART */
+#	define CONFIG_SYS_NS16550_CLK		33333000
+#else
+	/* FPGA UARTs use different clock */
+#	define CONFIG_SYS_NS16550_CLK		33333333
+#endif
+#define CONFIG_SYS_NS16550_COM1		(ARC_APB_PERIPHERAL_BASE + 0x5000)
+#define CONFIG_SYS_NS16550_COM2		(ARC_FPGA_PERIPHERAL_BASE + 0x20000)
+#define CONFIG_SYS_NS16550_COM3		(ARC_FPGA_PERIPHERAL_BASE + 0x21000)
+#define CONFIG_SYS_NS16550_COM4		(ARC_FPGA_PERIPHERAL_BASE + 0x22000)
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_BAUDRATE			115200
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C
+#define CONFIG_DW_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_ENV_EEPROM_BUS	2
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		0
+#define CONFIG_SYS_I2C_BASE		0xE001D000
+#define CONFIG_SYS_I2C_BASE1		0xE001E000
+#define CONFIG_SYS_I2C_BASE2		0xE001F000
+#define CONFIG_SYS_I2C_BUS_MAX		3
+#define IC_CLK				50
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_I2C_EEPROM_ADDR		(0xA8 >> 1)
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	32
+
+/*
+ * SD/MMC configuration
+ */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_DWMMC
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Ethernet PHY configuration
+ */
+#define CONFIG_PHYLIB
+#define CONFIG_MII
+#define CONFIG_PHY_GIGE
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_AUTONEG
+#define CONFIG_DW_SEARCH_PHY
+#define CONFIG_NET_MULTI
+
+/*
+ * Command line configuration
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RARP
+
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_MAXARGS		16
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_EEPROM
+#define CONFIG_ENV_SIZE			0x00200		/* 512 bytes */
+#define CONFIG_ENV_OFFSET		0
+
+/*
+ * Environment configuration
+ */
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTFILE			"uImage"
+#define CONFIG_BOOTARGS			"console=ttyS3,115200n8"
+#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
+
+/*
+ * Console configuration
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"AXS# "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+						sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/*
+ * Misc utility configuration
+ */
+#define CONFIG_BOUNCE_BUFFER
+
+#endif /* _CONFIG_AXS101_H_ */
diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index b41a823..5228ba6 100644
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -84,7 +84,6 @@
  * Clock Configuration
  */
 #undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			1000
 #define	CONFIG_SYS_CPUSPEED		0x290		/* 520MHz */
 
 /*
diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h
new file mode 100644
index 0000000..8e1c81f
--- /dev/null
+++ b/include/configs/bcm28155_ap.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:      GPL-2.0+
+ */
+
+#ifndef __BCM28155_AP_H
+#define __BCM28155_AP_H
+
+#include <asm/sizes.h>
+#include <asm/arch/sysmap.h>
+
+/* Architecture, CPU, chip, mach, etc */
+#define CONFIG_ARMV7
+#define CONFIG_KONA
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE		0xae000000
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_SDRAM_SIZE		0x80000000
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_SYS_MALLOC_LEN		SZ_4M	/* see armv7/start.S. */
+#define CONFIG_STACKSIZE		SZ_256K
+
+/* GPIO Driver */
+#define CONFIG_KONA_GPIO
+
+/* MMC/SD Driver */
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
+#define CONFIG_KONA_SDHCI
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+
+#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
+#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO0 "sdio1"
+#define CONFIG_SYS_SDIO1 "sdio2"
+#define CONFIG_SYS_SDIO2 "sdio3"
+#define CONFIG_SYS_SDIO3 "sdio4"
+
+/* I2C Driver */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_KONA
+#define CONFIG_SYS_SPD_BUS_NUM	3	/* Start with PMU bus */
+#define CONFIG_SYS_MAX_I2C_BUS	4
+#define CONFIG_SYS_I2C_BASE0	BSC1_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE1	BSC2_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE2	BSC3_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE3	PMU_BSC_BASE_ADDR
+
+/* Timer Driver */
+#define CONFIG_SYS_TIMER_RATE		32000
+#define CONFIG_SYS_TIMER_COUNTER	(TIMER_BASE_ADDR + 4) /* STCLO offset */
+
+/* Init functions */
+#define CONFIG_MISC_INIT_R	/* board's misc_init_r function */
+
+/* Some commands use this as the default load address */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
+
+/* No mtest functions as recommended */
+#undef CONFIG_CMD_MEMORY
+
+/*
+ * This is the initial SP which is used only briefly for relocating the u-boot
+ * image to the top of SDRAM. After relocation u-boot moves the stack to the
+ * proper place.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE
+
+/* Serial Info */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+/* Post pad 3 bytes after each reg addr */
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		13000000
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_SYS_NS16550_COM1		0x3e000000
+
+#define CONFIG_BAUDRATE			115200
+
+#define CONFIG_ENV_SIZE			0x10000
+#define CONFIG_ENV_IS_NOWHERE
+
+#define CONFIG_SYS_NO_FLASH	/* Not using NAND/NOR unmanaged flash */
+
+/* console configuration */
+#define CONFIG_SYS_CBSIZE		1024	/* Console buffer size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+			sizeof(CONFIG_SYS_PROMPT) + 16)	/* Printbuffer size */
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+/*
+ * One partition type must be defined for part.c
+ * This is necessary for the fatls command to work on an SD card
+ * for example.
+ */
+#define CONFIG_DOS_PARTITION
+
+/* version string, parser, etc */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/* Initial upstream - boot to cmd prompt only */
+#define CONFIG_BOOTCOMMAND		""
+
+/* Commands */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_FAT_WRITE
+
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+#endif /* __BCM28155_AP_H */
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 1a43e1b..12192ff 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -72,12 +72,13 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_HOSTNAME		"bf609-ezkit"
 #define CONFIG_DESIGNWARE_ETH
+#define CONFIG_PHY_ADDR		1
 #define CONFIG_DW_PORTS		1
-#define CONFIG_DW_AUTONEG
 #define CONFIG_DW_ALTDESCRIPTOR
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_MII
 #define CONFIG_MII
+#define CONFIG_PHYLIB
 
 /* i2c Settings */
 #define CONFIG_BFIN_TWI_I2C
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
new file mode 100644
index 0000000..7bbe596
--- /dev/null
+++ b/include/configs/bur_am335x_common.h
@@ -0,0 +1,196 @@
+/*
+ * bur_am335x_common.h
+ *
+ * common parts used by B&R AM335x based boards
+ *
+ * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier:        GPL-2.0+
+ */
+
+#ifndef __BUR_AM335X_COMMON_H__
+#define __BUR_AM335X_COMMON_H__
+/* ------------------------------------------------------------------------- */
+#define CONFIG_AM33XX
+#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
+
+/* Timer information */
+#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
+
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_POWER_TPS65217
+
+#define CONFIG_SYS_NO_FLASH		/* have no NOR-flash */
+
+#include <asm/arch/omap.h>
+
+/* NS16550 Configuration */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		48000000
+#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
+#define CONFIG_BAUDRATE			115200
+
+/* Network defines */
+#define CONFIG_CMD_NET			/* 'bootp' and 'tftp' */
+#define CONFIG_CMD_DHCP
+#define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT		4
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
+#define CONFIG_MII			/* Required in net/eth.c */
+#define CONFIG_SPL_ETH_SUPPORT
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_NATSEMI
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT		/* used for a fetching MAC-Address */
+#define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"
+
+/*
+ * SPL related defines.  The Public RAM memory map the ROM defines the
+ * area between 0x402F0400 and 0x4030B800 as a download area and
+ * 0x4030B800 to 0x4030CE00 as a public stack area.  The ROM also
+ * supports X-MODEM loading via UART, and we leverage this and then use
+ * Y-MODEM to load u-boot.img, when booted over UART.
+ */
+#define CONFIG_SPL_TEXT_BASE		0x402F0400
+#define CONFIG_SPL_MAX_SIZE		(0x4030B800 - CONFIG_SPL_TEXT_BASE)
+
+/*
+ * Since SPL did pll and ddr initialization for us,
+ * we don't need to do it twice.
+ */
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif /* !CONFIG_SPL_BUILD, ... */
+/*
+ * Our DDR memory always starts at 0x80000000 and U-Boot shall have
+ * relocated itself to higher in memory by the time this value is used.
+ */
+#define CONFIG_SYS_LOAD_ADDR		0x80000000
+/*
+ * ----------------------------------------------------------------------------
+ * DDR information.  We say (for simplicity) that we have 1 bank,
+ * always, even when we have more.  We always start at 0x80000000,
+ * and we place the initial stack pointer in our SRAM.
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
+					GENERATED_GBL_DATA_SIZE)
+
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
+#define CONFIG_SYS_I2C_OMAP24XX
+
+/* GPIO */
+#define CONFIG_OMAP_GPIO
+#define CONFIG_CMD_GPIO
+/*
+ * ----------------------------------------------------------------------------
+ * The following are general good-enough settings for U-Boot.  We set a
+ * large malloc pool as we generally have a lot of DDR, and we opt for
+ * function over binary size in the main portion of U-Boot as this is
+ * generally easily constrained later if needed.  We enable the config
+ * options that give us information in the environment about what board
+ * we are on so we do not need to rely on the command prompt.  We set a
+ * console baudrate of 115200 and use the default baud rate table.
+ */
+#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT		"U-Boot (BuR V2.0)# "
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_ENV_OVERWRITE		/* Overwrite ethaddr / serial# */
+
+/* As stated above, the following choices are optional. */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_VERSION_VARIABLE
+
+/* We set the max number of command args high to avoid HUSH bugs. */
+#define CONFIG_SYS_MAXARGS		64
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		512
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +\
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+/*
+ * For commands to use, we take the default list and add a few other
+ * useful commands.  Note that we must have set CONFIG_SYS_NO_FLASH
+ * prior to this include, in order to skip a few commands.  When we do
+ * have flash, if we expect these commands they must be enabled in that
+ * config.  If desired, a specific list of desired commands can be used
+ * instead.
+ */
+#include <config_cmd_default.h>
+/* undefine commands, which we do not need */
+#undef CONFIG_CMD_EDITENV
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_ITEST
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_CRC32
+/* define command we need always */
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_SOURCE
+
+/*
+ * Our platforms make use of SPL to initalize the hardware (primarily
+ * memory) enough for full U-Boot to be loaded.  We also support Falcon
+ * Mode so that the Linux kernel can be booted directly from SPL
+ * instead, if desired.  We make use of the general SPL framework found
+ * under common/spl/.  Given our generally common memory map, we set a
+ * number of related defaults and sizes here.
+ */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+/*
+ * Place the image at the start of the ROM defined image space.
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.  We load U-Boot itself into memory at
+ * 0x80800000 for legacy reasons (to not conflict with older SPLs).  We
+ * have our BSS be placed 1MiB after this, to allow for the default
+ * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
+ * We have the SPL malloc pool at the end of the BSS area.
+ *
+ * ----------------------------------------------------------------------------
+ */
+#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
+#undef  CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE		0x80800000
+#define CONFIG_SPL_BSS_START_ADDR	0x80A00000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
+					CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
+
+/* General parts of the framework, required. */
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#endif	/* ! __BUR_AM335X_COMMON_H__ */
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index 4abb03e..e80d1a6 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -30,6 +30,10 @@
 #define V_PROMPT		"Tegra30 (Cardhu) # "
 #define CONFIG_TEGRA_BOARD_STRING	"NVIDIA Cardhu"
 
+#define BOARD_EXTRA_ENV_SETTINGS \
+	"board_name=cardhu-a04\0" \
+	"fdtfile=tegra30-cardhu-a04.dtb\0"
+
 /* Board-specific serial config */
 #define CONFIG_SERIAL_MULTI
 #define CONFIG_TEGRA_ENABLE_UARTA
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index 56e9a8e..26b615b 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -114,7 +114,6 @@
 /* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_ATHEROS
 
 /* NAND support */
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 7729a02..08c67f5 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -45,13 +45,6 @@
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_OF_LIBFDT		1
-/*
- * The early kernel mapping on ARM currently only maps from the base of DRAM
- * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
- * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
- * so that leaves DRAM base to DRAM base + 0x4000 available.
- */
-#define CONFIG_SYS_BOOTMAPSZ	        0x4000
 
 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 11ba4cf..959e188 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -33,7 +33,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-#define CONFIG_SYS_HZ		        1000
 
 #define CONFIG_AT91FAMILY
 
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index bcb21fe..3d39b10 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -29,7 +29,6 @@
  */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
-#define CONFIG_SYS_GBL_DATA_SIZE	128
 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE		SZ_64M
 #define CONFIG_SYS_TEXT_BASE		0x83FA0000
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 31fc65d..7877897 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -217,9 +217,8 @@
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */
 #define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE /* End of used area */
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128  /* size/bytes res'd for init data*/
 #define CONFIG_SYS_GBL_DATA_OFFSET \
-	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 04ae3ca..291c538 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -34,8 +34,19 @@
 
 #define CONFIG_SYS_OMAP_ABE_SYSCK
 
+/* Define the default GPT table for eMMC */
+#define PARTS_DEFAULT \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
+
 #include <configs/ti_omap5_common.h>
 
+/* Enhance our eMMC support / experience. */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
 /* CPSW Ethernet */
 #define CONFIG_CMD_NET			/* 'bootp' and 'tftp' */
 #define CONFIG_CMD_DHCP
@@ -51,7 +62,6 @@
 #define CONFIG_MII			/* Required in net/eth.c */
 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			2
 
 /* SPI */
 #undef	CONFIG_OMAP3_SPI
@@ -73,6 +83,8 @@
 #define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 
+#define CONFIG_SUPPORT_EMMC_BOOT
+
 /* USB xHCI HOST */
 #define CONFIG_CMD_USB
 #define CONFIG_USB_HOST
diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h
deleted file mode 100644
index 1af7f16..0000000
--- a/include/configs/dvlhost.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the
- * dLAN200 AV Wireless G ("dvlhost") board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425			1
-#define CONFIG_DVLHOST			1
-
-#define	CONFIG_MACH_TYPE		1343
-
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE	IXP425_UART2
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTDELAY		3
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F	1
-#define CONFIG_SYS_LDSCRIPT	"board/dvlhost/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-#define CONFIG_PCI
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#define CONFIG_PCI_PNP
-#define CONFIG_IXP_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI_ENUM
-#endif
-
-#define CONFIG_BOOTCOMMAND		"run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE		230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE		256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS		16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START	0x00000000
-#define CONFIG_SYS_MEMTEST_END		0x01D80000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK         66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR		0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, \
-					  115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE	1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0		0xbd113442
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-
-/* 32MB SDRAM: 2* 8Mx16, CL3 */
-#define CONFIG_SYS_SDR_CONFIG		0x18
-#define PHYS_SDRAM_1_SIZE		0x02000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT	0x800
-#define CONFIG_SYS_SDR_MODE_CONFIG	0x1
-#define CONFIG_SYS_DRAM_SIZE		PHYS_SDRAM_1_SIZE
-
-/* FLASH organization: one Spansion S29AL032D-04 Flash */
-#define CONFIG_SYS_TEXT_BASE		0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT	140
-#define PHYS_FLASH_1			0x50000000
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ PHYS_FLASH_1 }
-
-#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT         262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE		1
-
-/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
-#define	CONFIG_PHY_ADDR			0x18
-/* NPE1 PHY: MII IP175 switch, port 5 is host port */
-#define	CONFIG_PHY1_ADDR		0x05
-/* MII PHY management */
-#define CONFIG_MII			1
-/* fixed-speed powerline modem without standard PHY registers on MII */
-#define CONFIG_MII_NPE0_FIXEDLINK       1
-#define CONFIG_MII_NPE0_SPEED           100
-#define CONFIG_MII_NPE0_FULLDUPLEX      1
-/* fixed-speed switch without standard PHY registers on MII */
-#define CONFIG_MII_NPE1_FIXEDLINK       1
-#define CONFIG_MII_NPE1_SPEED           100
-#define CONFIG_MII_NPE1_FULLDUPLEX      1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER	16
-#define CONFIG_RESET_PHY_R		1
-/* ethernet switch connected to MII port */
-#define CONFIG_MII_ETHSWITCH		1
-#define CONFIG_HAS_ETH1			1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE	32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define	CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV		1
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"npe_ucode=50040000\0"						\
-	"ethprime=NPE1\0"						\
-	"ethrotate=no\0"						\
-	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
-	"kerneladdr=50050000\0"						\
-	"kernelfile=dvlhost/uImage\0"					\
-	"rootfile=dvlhost/rootfs\0"					\
-	"rootaddr=50170000\0"						\
-	"loadaddr=10000\0"						\
-	"updateboot_ser=mw.b 10000 ff 40000;"				\
-	" loady ${loadaddr};"						\
-	" run eraseboot writeboot\0"					\
-	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} dvlhost/u-boot.bin;"				\
-	" run eraseboot writeboot\0"					\
-	"eraseboot=protect off 50000000 50003fff;"			\
-	" protect off 50006000 5003ffff;"				\
-	" erase 50000000 50003fff;"					\
-	" erase 50006000 5003ffff\0"					\
-	"writeboot=cp.b 10000 50000000 4000;"				\
-	" cp.b 16000 50006000 3a000\0"					\
-	"updateucode=loady;"						\
-	" era ${npe_ucode} +${filesize};"				\
-	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
-	"updateroot=tftp ${loadaddr} ${rootfile};"			\
-	" era ${rootaddr} +${filesize};"				\
-	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
-	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
-	" era ${kerneladdr} +${filesize};"				\
-	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
-	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
-	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
-	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
-	"boot_flash=run flashargs addtty addeth;"			\
-	" bootm ${kerneladdr}\0"					\
-	"boot_net=run netargs addtty addeth;"				\
-	" tftpboot ${loadaddr} ${kernelfile};"				\
-	" bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR						\
-	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h
index 1e42f5c..75f7812 100644
--- a/include/configs/dxr2.h
+++ b/include/configs/dxr2.h
@@ -26,6 +26,7 @@
 
 #define BOARD_DFU_BUTTON_GPIO	27
 #define BOARD_DFU_BUTTON_LED	64
+#define GPIO_LAN9303_NRST	88	/* GPIO2_24 = gpio88 */
 
 #undef CONFIG_DOS_PARTITION
 #undef CONFIG_CMD_FAT
@@ -49,7 +50,6 @@
 
 #undef CONFIG_MII
 #undef CONFIG_PHY_GIGE
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
 #define CONFIG_FACTORYSET
diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
index 3a5cc74..e26591c 100644
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@@ -158,8 +158,6 @@
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
 
 /* ENV setting */
diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h
index ac65620..6bf3408 100644
--- a/include/configs/hummingboard.h
+++ b/include/configs/hummingboard.h
@@ -190,7 +190,6 @@
 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
-#define CONFIG_SYS_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING
 
diff --git a/include/configs/io.h b/include/configs/io.h
index 7f86767..9da6cc6 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -198,9 +198,8 @@
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */
 #define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE /* End of used area */
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128  /* size/bytes res'd for init data*/
 #define CONFIG_SYS_GBL_DATA_OFFSET \
-	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index d34b91d..f36c2a3 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -238,9 +238,8 @@ int fpga_gpio_get(unsigned int bus, int pin);
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */
 #define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE /* End of used area */
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128  /* size/bytes res'd for init data*/
 #define CONFIG_SYS_GBL_DATA_OFFSET \
-	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 2a15ad4..517f46a 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -99,11 +99,16 @@
 #define CONFIG_KM_UBI_PARTITION_NAME_BOOT	"ubi0"
 #endif /* CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 
+#ifndef CONFIG_KM_UBI_PART_BOOT_OPTS
+#define CONFIG_KM_UBI_PART_BOOT_OPTS		""
+#endif /* CONFIG_KM_UBI_PART_BOOT_OPTS */
+
 #ifndef CONFIG_KM_UBI_PARTITION_NAME_APP
 /* one flash chip only called boot */
 /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 # define CONFIG_KM_UBI_LINUX_MTD					\
-	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT
+	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT			\
+	CONFIG_KM_UBI_PART_BOOT_OPTS
 # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI				\
 	"ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "\0"
 #else /* CONFIG_KM_UBI_PARTITION_NAME_APP */
@@ -111,7 +116,8 @@
 /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */
 /* app:  CONFIG_KM_UBI_PARTITION_NAME_APP */
 # define CONFIG_KM_UBI_LINUX_MTD					\
-	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT " "		\
+	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT			\
+	CONFIG_KM_UBI_PART_BOOT_OPTS " "				\
 	"ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_APP
 # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI				\
 	"ubiattach=if test ${boot_bank} -eq 0; then; "			\
@@ -135,8 +141,8 @@
  * - 'release': for a standalone system		kernel/rootfs from flash
  */
 #define CONFIG_KM_DEF_ENV_BOOTTARGETS					\
-	"subbootcmds=ubiattach ubicopy cramfsloadfdt cramfsloadkernel "	\
-		"flashargs add_default addpanic boot\0"			\
+	"subbootcmds=ubiattach ubicopy cramfsloadfdt set_fdthigh "	\
+		"cramfsloadkernel flashargs add_default addpanic boot\0"\
 	"develop="							\
 		"tftp 200000 scripts/develop-${arch}.txt && "		\
 		"env import -t 200000 ${filesize} && "			\
@@ -220,6 +226,7 @@
 	CONFIG_KM_DEF_ENV_FLASH_BOOT					\
 	CONFIG_KM_DEF_ENV_CONSTANTS					\
 	"altbootcmd=run bootcmd\0"					\
+	"boot=bootm ${load_addr_r} - ${fdt_addr_r}\0"			\
 	"bootcmd=km_checkbidhwk &&  "					\
 		"setenv bootcmd \'if km_checktestboot; then; "          \
 				"setenv boot_bank ${test_bank}; else; " \
@@ -229,6 +236,10 @@
 			"run ${subbootcmds}; reset\' && "		\
 		"saveenv && saveenv && boot\0"				\
 	"bootlimit=3\0"							\
+	"cramfsloadfdt="						\
+		"cramfsload ${fdt_addr_r} "				\
+		"fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0"		\
+	"fdt_addr_r="__stringify(CONFIG_KM_FDT_ADDR) "\0"		\
 	"init=/sbin/init-overlay.sh\0"					\
 	"load_addr_r="__stringify(CONFIG_KM_KERNEL_ADDR) "\0"		\
 	"load=tftpboot ${load_addr_r} ${u-boot}\0"			\
diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 2cebb2b..763c5ba 100644
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -70,11 +70,6 @@
 #define CONFIG_KM_DEF_BOOT_ARGS_CPU		""
 
 #define CONFIG_KM_DEF_ENV_CPU						\
-	"boot=bootm ${load_addr_r} - ${fdt_addr_r}\0"			\
-	"cramfsloadfdt="						\
-		"cramfsload ${fdt_addr_r} "				\
-		"fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0"		\
-	"fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0"		\
 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
 	"update="							\
 		"protect off " __stringify(BOOTFLASH_START) " +${filesize} && "\
@@ -82,6 +77,7 @@
 		"cp.b ${load_addr_r} " __stringify(BOOTFLASH_START)	\
 		"  ${filesize} && "					\
 		"protect on " __stringify(BOOTFLASH_START) "  +${filesize}\0"\
+	"set_fdthigh=true\0"						\
 	""
 
 #endif /* __CONFIG_KEYMILE_POWERPC_H */
diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h
index 5e075c8..ae6b6dc 100644
--- a/include/configs/km/km83xx-common.h
+++ b/include/configs/km/km83xx-common.h
@@ -84,7 +84,6 @@
 #define CONFIG_SYS_INIT_RAM_LOCK
 #define CONFIG_SYS_INIT_RAM_ADDR	0xE6000000 /* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000 /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	0x100 /* num bytes initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
 						GENERATED_GBL_DATA_SIZE)
 
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index e74f85f..6d77680 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -70,7 +70,8 @@
 #define CONFIG_KM_PHRAM		0x17F000
 
 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
-#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
+#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
+#define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */
 
 /* architecture specific default bootargs */
 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
@@ -78,15 +79,17 @@
 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
 
 #define CONFIG_KM_DEF_ENV_CPU						\
-	"boot=bootm ${load_addr_r} - -\0"				\
-	"cramfsloadfdt=true\0"						\
 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
 	CONFIG_KM_UPDATE_UBOOT						\
+	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
 	""
 
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
 #define CONFIG_MISC_INIT_R
 
+/* Pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+
 /*
  * NS16550 Configuration
  */
@@ -289,10 +292,15 @@ int get_scl(void);
 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
 #endif
 
+#ifndef CONFIG_KM_BOARD_EXTRA_ENV
+#define CONFIG_KM_BOARD_EXTRA_ENV       ""
+#endif
+
 /*
  * Default environment variables
  */
 #define CONFIG_EXTRA_ENV_SETTINGS					\
+	CONFIG_KM_BOARD_EXTRA_ENV					\
 	CONFIG_KM_DEF_ENV						\
 	CONFIG_KM_NEW_ENV						\
 	"arch=arm\0"							\
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 2466649..0d24f78 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -15,6 +15,10 @@
 
 #define CONFIG_KM_DEF_NETDEV	"netdev=eth0\0"
 
+/* an additionnal option is required for UBI as subpage access is
+ * supported in u-boot */
+#define CONFIG_KM_UBI_PART_BOOT_OPTS		",2048"
+
 #define CONFIG_NAND_ECC_BCH
 
 /* common KM defines */
@@ -148,8 +152,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_KM_KERNEL_ADDR	0x1000000	/* max kernel size 15.5Mbytes */
 #define CONFIG_KM_FDT_ADDR	0x1F80000	/* max dtb    size  0.5Mbytes */
 
-#define CONFIG_BOOTCOUNT_LIMIT
-
 /*
  * Local Bus Definitions
  */
@@ -206,8 +208,13 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_BR1_PRELIM  CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */
 #define CONFIG_SYS_OR1_PRELIM  CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */
 
+/* bootcounter in QRIO */
+#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_QRIO_BASE + 0x20)
+
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R	/* call board_early_init_r function */
+#define CONFIG_MISC_INIT_F
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
 
@@ -263,7 +270,10 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_FIT_VERBOSE	/* enable fit_format_{error,warning}() */
 
 /* I2C */
+
 #define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_SYS_I2C_SPEED		100000 /* deblocking */
 #define CONFIG_SYS_NUM_I2C_BUSES	3
 #define CONFIG_SYS_I2C_MAX_HOPS		1
 #define CONFIG_SYS_I2C_FSL		/* Use FSL I2C driver */
@@ -276,6 +286,12 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 					{0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \
 					{0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \
 				}
+#ifndef __ASSEMBLY__
+void set_sda(int state);
+void set_scl(int state);
+int get_sda(void);
+int get_scl(void);
+#endif
 
 #define CONFIG_KM_IVM_BUS		1	/* I2C1 (Mux-Port 1)*/
 
@@ -286,6 +302,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_BAR	/* 4 byte-addressing */
 #define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         20000000
 #define CONFIG_SF_DEFAULT_MODE          0
@@ -420,6 +437,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 	"update="							\
 		"sf probe 0;sf erase 0 +${filesize};"			\
 		"sf write ${load_addr_r} 0 ${filesize};\0"		\
+	"set_fdthigh=true\0"						\
 	""
 
 #define CONFIG_HW_ENV_SETTINGS						\
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 74c7232..2cde177 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -45,11 +45,19 @@
 #define CONFIG_KM_DISABLE_PCIE
 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
 
-/* KM_NUSA */
-#elif defined(CONFIG_KM_NUSA)
+/* KM_NUSA / KM_SUGP1 */
+#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
+
+# if defined(CONFIG_KM_NUSA)
 #define CONFIG_IDENT_STRING		"\nKeymile NUSA"
 #define CONFIG_HOSTNAME			kmnusa
+# elif defined(CONFIG_KM_SUGP1)
+#define CONFIG_IDENT_STRING		"\nKeymile SUGP1"
+#define CONFIG_HOSTNAME			kmsugp1
+#define KM_PCIE_RESET_MPP7
+#endif
+
 #undef CONFIG_SYS_KWD_CONFIG
 #define CONFIG_SYS_KWD_CONFIG \
 		$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
@@ -97,6 +105,9 @@
 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
 #define CONFIG_IDENT_STRING		"\nKeymile SUV31"
 #define CONFIG_HOSTNAME			kmsuv31
+#undef CONFIG_SYS_KWD_CONFIG
+#define CONFIG_SYS_KWD_CONFIG \
+		$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
 #define CONFIG_KM_FPGA_CONFIG
 
diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h
index 4158c8d..8bb3571 100644
--- a/include/configs/kmp204x.h
+++ b/include/configs/kmp204x.h
@@ -13,6 +13,11 @@
 #define CONFIG_HOSTNAME		kmlion1
 #define CONFIG_KM_BOARD_NAME	"kmlion1"
 
+/* KMCOGE4 */
+#elif defined(CONFIG_KMCOGE4)
+#define CONFIG_HOSTNAME		kmcoge4
+#define CONFIG_KM_BOARD_NAME	"kmcoge4"
+
 #else
 #error ("Board not supported")
 #endif
@@ -42,6 +47,7 @@
 #define CONFIG_SYS_BR2_PRELIM  CONFIG_SYS_LBAPP1_BR_PRELIM
 /* Local bus app1 Options */
 #define CONFIG_SYS_OR2_PRELIM  CONFIG_SYS_LBAPP1_OR_PRELIM
+#endif
 
 /* App2 Local bus */
 #define CONFIG_SYS_LBAPP2_BASE		0xE0000000
@@ -63,6 +69,5 @@
 #define CONFIG_SYS_BR3_PRELIM  CONFIG_SYS_LBAPP2_BR_PRELIM
 /* Local bus app2 Options */
 #define CONFIG_SYS_OR3_PRELIM  CONFIG_SYS_LBAPP2_OR_PRELIM
-#endif
 
 #endif	/* __CONFIG_H */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index cc3c7a8..90e2d7a 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -106,7 +106,6 @@
 #define CONFIG_SYS_MONITOR_BASE		0x00000000
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
 
 /* FLASH */
@@ -171,7 +170,6 @@
 #define CONFIG_SH_TMU_CLK_FREQ	CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ	14745600
 #define CONFIG_SYS_TMU_CLK_DIV	4
-#define CONFIG_SYS_HZ		1000
 
 /* i2c */
 #define CONFIG_CMD_I2C
diff --git a/include/configs/kwb.h b/include/configs/kwb.h
new file mode 100644
index 0000000..0f631c0
--- /dev/null
+++ b/include/configs/kwb.h
@@ -0,0 +1,128 @@
+/*
+ * kwb.h
+ *
+ * specific parts for B&R KWB Motherboard
+ *
+ * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier:        GPL-2.0+
+ */
+
+#ifndef __CONFIG_KWB_H__
+#define __CONFIG_KWB_H__
+
+#include <configs/bur_am335x_common.h>
+/* ------------------------------------------------------------------------- */
+/* Clock Defines */
+#define V_OSCK				26000000  /* Clock output from T2 */
+#define V_SCLK				(V_OSCK)
+
+#define CONFIG_POWER_TPS65217
+
+#define CONFIG_MACH_TYPE		3589
+/* I2C IP block */
+#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC	20000
+
+/* GPIO */
+#define CONFIG_SPL_GPIO_SUPPORT
+
+/* MMC/SD IP block */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /*addr. 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS		0x200 /* 256 KB */
+#define CONFIG_SPL_MMC_SUPPORT
+
+#undef CONFIG_SPL_OS_BOOT
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_SYS_SPL_ARGS_ADDR		0x80F80000
+
+/* RAW SD card / eMMC */
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
+
+#endif /* CONFIG_SPL_OS_BOOT */
+
+/* Always 128 KiB env size */
+#define CONFIG_ENV_SIZE			(128 << 10)
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"autoload=0\0" \
+	"loadaddr=0x80100000\0" \
+	"bootfile=arimg\0" \
+	"usbboot=echo Booting from USB-Stick ...; " \
+		"usb start; " \
+		"fatload usb 0 ${loadaddr} ${bootfile}; " \
+		"usb stop; " \
+		"go ${loadaddr};\0" \
+	"netboot=echo Booting from network ...; " \
+		"setenv autoload 0; " \
+		"dhcp; " \
+		"tftp ${loadaddr} arimg; " \
+		"go ${loadaddr}\0" \
+	"usbupdate=echo Updating UBOOT from USB-Stick ...; " \
+		"usb start; " \
+		"fatload usb 0 0x80000000 updateubootusb.img; " \
+		"source;\0" \
+	"netupdate=echo Updating UBOOT from Network (TFTP) ...; " \
+		"setenv autoload 0; " \
+		"dhcp;" \
+		"tftp 0x80000000 updateUBOOT.img;" \
+		"source;\0"
+#endif /* !CONFIG_SPL_BUILD*/
+
+#define CONFIG_BOOTCOMMAND \
+	"run usbupdate;"
+#define CONFIG_BOOTDELAY		1 /* TODO: für release auf 0 setzen */
+
+/* undefine command which we not need here */
+#undef	CONFIG_BOOTM_LINUX
+#undef	CONFIG_BOOTM_NETBSD
+#undef	CONFIG_BOOTM_PLAN9
+#undef	CONFIG_BOOTM_RTEMS
+#undef	CONFIG_GZIP
+#undef	CONFIG_ZLIB
+#undef CONFIG_CMD_CRC32
+
+/* USB configuration */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_MUSB_PIO_ONLY
+#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT
+/* attention! not only for gadget, enables also highspeed in hostmode */
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_MUSB_HOST
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE	MUSB_HOST
+
+#ifdef CONFIG_MUSB_HOST
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#endif /* CONFIG_MUSB_HOST */
+
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		1
+#define CONFIG_SYS_MMC_ENV_PART		2
+#define CONFIG_ENV_OFFSET		0x40000	/* TODO: Adresse definieren */
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+/*
+ * Common filesystems support.  When we have removable storage we
+ * enabled a number of useful commands and support.
+ */
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+#define CONFIG_CMD_FS_GENERIC
+#endif /* CONFIG_MMC, ... */
+
+#endif	/* ! __CONFIG_TSERIES_H__ */
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index f183279..4d11c7d 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -88,7 +88,6 @@
 
 #define CONFIG_SYS_MONITOR_BASE	(KZM_FLASH_BASE)
 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
 
 #define CONFIG_SYS_TEXT_BASE		0x00000000
diff --git a/include/configs/lager.h b/include/configs/lager.h
index b6c1954..b420e45 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -109,7 +109,6 @@
 #define CONFIG_SYS_MONITOR_BASE		0x00000000
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
 
 #if defined(CONFIG_SYS_USE_BOOT_NORFLASH)
@@ -196,6 +195,5 @@
 #define CONFIG_SH_SCIF_CLK_FREQ	CONFIG_MP_CLK_FREQ
 
 #define CONFIG_SYS_TMU_CLK_DIV	4
-#define CONFIG_SYS_HZ		1000
 
 #endif	/* __LAGER_H */
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index dcd29ce..7c5c2f4 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -98,6 +98,7 @@
 
 /* EHCI */
 #define CONFIG_USB_STORAGE
+#define CONFIG_OMAP3_GPIO_2
 #define CONFIG_OMAP3_GPIO_5
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_OMAP
@@ -263,10 +264,9 @@
 			"${mtdparts} "					\
 			"vram=6M omapfb.vram=1:2M,2:2M,3:2M "		\
 			"omapdss.def_disp=lcd;"				\
-		"bootm 0x82000000 0x84000000\0"
-
-#define CONFIG_BOOTCOMMAND \
-	"run nandboot"
+		"bootm 0x82000000 0x84000000\0"				\
+	"bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;"	\
+		"then source 82000000;else run nandboot;fi\0"
 
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_CMDLINE_EDITING
@@ -395,6 +395,7 @@
 #define CONFIG_SYS_NAND_ECCSIZE		256
 #define CONFIG_SYS_NAND_ECCBYTES	3
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
+#define CONFIG_SPL_NAND_SOFTECC
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index aa8d59d..486787e 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -200,7 +200,8 @@
 # define CONFIG_SYS_MAX_FLASH_SECT	512
 /* hardware flash protection */
 # define CONFIG_SYS_FLASH_PROTECTION
-
+/* use buffered writes (20x faster) */
+# define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
 # ifdef	RAMENV
 #  define CONFIG_ENV_IS_NOWHERE	1
 #  define CONFIG_ENV_SIZE	0x1000
@@ -446,4 +447,64 @@
 # undef CONFIG_PHYLIB
 #endif
 
+/* SPL part */
+#define CONFIG_SPL
+#define CONFIG_CMD_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+
+#define CONFIG_SPL_LDSCRIPT	"arch/microblaze/cpu/u-boot-spl.lds"
+
+#define CONFIG_SPL_RAM_DEVICE
+#define CONFIG_SPL_NOR_SUPPORT
+
+/* for booting directly linux */
+#define CONFIG_SPL_OS_BOOT
+
+#define CONFIG_SYS_OS_BASE		(CONFIG_SYS_FLASH_BASE + \
+					 0x60000)
+#define CONFIG_SYS_FDT_BASE		(CONFIG_SYS_FLASH_BASE + \
+					 0x40000)
+#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_TEXT_BASE + \
+					 0x1000000)
+
+/* SP location before relocation, must use scratch RAM */
+/* BRAM start */
+#define CONFIG_SYS_INIT_RAM_ADDR	0x0
+/* BRAM size - will be generated */
+#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
+/* Stack pointer prior relocation, must situated at on-chip RAM */
+#define CONFIG_SYS_SPL_MALLOC_END	(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100
+
+/*
+ * The main reason to do it in this way is that MALLOC_START
+ * can't be defined - common/spl/spl.c
+ */
+#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
+# define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_SPL_MALLOC_END - \
+					 CONFIG_SYS_SPL_MALLOC_SIZE)
+# define CONFIG_SPL_STACK_ADDR		CONFIG_SYS_SPL_MALLOC_START
+#else
+# define CONFIG_SPL_STACK_ADDR		CONFIG_SYS_SPL_MALLOC_END
+#endif
+
+/* Just for sure that there is a space for stack */
+#define CONFIG_SPL_STACK_SIZE		0x100
+
+#define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_INIT_RAM_SIZE - \
+					 CONFIG_SYS_INIT_RAM_ADDR - \
+					 GENERATED_GBL_DATA_SIZE - \
+					 CONFIG_SYS_SPL_MALLOC_SIZE - \
+					 CONFIG_SPL_STACK_SIZE)
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h
deleted file mode 100644
index 5e9e98d..0000000
--- a/include/configs/mini2440.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- * Gary Jennejohn <gj@denx.de>
- * David Mueller <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2009-2010
- * Michel Pollet <buserror@gmail.com>
- *
- * (C) Copyright 2012
- * Gabriel Huau <contact@huau-gabriel.fr>
- *
- * Configuation settings for the MINI2440 board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_SYS_TEXT_BASE 0x0
-#define CONFIG_S3C2440_GPIO
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_ARM920T			/* This is an ARM920T Core	*/
-#define CONFIG_S3C24X0			/* in a SAMSUNG S3C24X0 SoC */
-#define CONFIG_S3C2440			/* in a SAMSUNG S3C2440 SoC */
-#define CONFIG_MINI2440			/* on a MIN2440 Board       */
-
-#define MACH_TYPE_MINI2440	1999
-#define CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
-
-/*
- * We don't use lowlevel_init
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/*
- * input clock of PLL
- */
-/* MINI2440 has 12.0000MHz input clock */
-#define CONFIG_SYS_CLK_FREQ	12000000
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_DRIVER_DM9000
-#define CONFIG_DRIVER_DM9000_NO_EEPROM
-#define CONFIG_DM9000_BASE				0x20000300
-#define DM9000_IO		CONFIG_DM9000_BASE
-#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
-
-/*
- * select serial console configuration
- */
-#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1
-
-/*
- * allow to overwrite serial and ethaddr
- */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command definition
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PORTIO
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SAVES
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_LONGHELP
-#define CONFIG_SYS_PROMPT	"MINI2440 => "
-#define CONFIG_SYS_CBSIZE	256
-#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS	32
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START	0x30000000
-#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM	*/
-
-/* default load address	*/
-#define CONFIG_SYS_LOAD_ADDR		0x32000000
-
-/* boot parameters address */
-#define CONFIG_BOOT_PARAM_ADDR		0x30000100
-
-/*
- * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
- * it to wrap 100 times (total 1562500) to get 1 sec.
- */
-#define CONFIG_SYS_HZ			1562500
-
-/*
- * valid baudrates
- */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_BAUDRATE		115200
-
-/*
- * Stack sizes
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
-#endif
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_SIZE             (64*1024*1024) /* 64MB of DRAM */
-#define CONFIG_SYS_SDRAM_BASE       0x30000000
-#define CONFIG_SYS_FLASH_BASE		0x0
-
-/*
- * Stack should be on the SRAM because
- * DRAM is not init
- */
-#define CONFIG_SYS_INIT_SP_ADDR		(0x40001000 - GENERATED_GBL_DATA_SIZE)
-
-/*
- * NOR FLASH organization
- * Now uses the standard CFI interface
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
-#define CONFIG_SYS_MONITOR_BASE		0x0
-/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-/* 512 * 4096 sectors, or 32 * 64k blocks */
-#define CONFIG_SYS_MAX_FLASH_SECT	512
-#define CONFIG_FLASH_SHOW_PROGRESS  1
-
-/*
- * Config for NOR flash
- */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_MY_ENV_OFFSET	0x40000
-/* addr of environment */
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_MY_ENV_OFFSET)
-/* 16k Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE		0x4000
-
-/* ATAG configuration */
-#define CONFIG_INITRD_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 363b277..55ecef9 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -59,7 +59,6 @@
 
 /* Memory sizes */
 #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
 #define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
 #define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index e656551..ac517ce 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -31,7 +31,7 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 #define CONFIG_MXC_GPIO
-#define CONFIG_MV_UDC
+#define CONFIG_CI_UDC
 #define CONFIG_USBD_HS
 #define CONFIG_USB_GADGET_DUALSPEED
 #define CONFIG_USB_ETHER
diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h
index 18714ea..133dc6f 100644
--- a/include/configs/o2dnt-common.h
+++ b/include/configs/o2dnt-common.h
@@ -275,10 +275,8 @@
 #define CONFIG_SYS_INIT_RAM_END		MPC5XXX_SRAM_SIZE
 #endif
 
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
-					 CONFIG_SYS_GBL_DATA_SIZE)
+					 GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 51dff23..783b7c3 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -37,6 +37,7 @@
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 #define CONFIG_HSMMC2_8BIT
+#define CONFIG_SUPPORT_EMMC_BOOT
 
 /* Required support for the TCA642X GPIO we have on the uEVM */
 #define CONFIG_TCA642X
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 117484d..07b6179 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -159,12 +159,12 @@
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
 #define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_MMC_BOOT
@@ -189,12 +189,12 @@
 #define CONFIG_FSL_LAW         /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_SPI_BOOT
@@ -579,11 +579,15 @@
 #define CONFIG_SYS_INIT_L2_ADDR_PHYS	CONFIG_SYS_INIT_L2_ADDR
 #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
 #define CONFIG_SPL_RELOC_TEXT_BASE	0xf8f81000
-#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE	(32 << 10)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE	(96 << 10)
 #define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE	(32 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
+#if defined(CONFIG_P2020RDB)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(364 << 10)
+#else
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(108 << 10)
+#endif
 #elif defined(CONFIG_NAND)
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SYS_INIT_L2_ADDR		0xf8f80000
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 601bac7..c296a07 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -238,9 +238,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_OF_BOARD_SETUP
 #define CONFIG_OF_STDOUT_VIA_ALIAS
 
-#define CONFIG_SYS_64BIT_VSPRINTF
-#define CONFIG_SYS_64BIT_STRTOUL
-
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE	/* enable fit_format_{error,warning}() */
diff --git a/include/configs/palmld.h b/include/configs/palmld.h
index 2a9fd22..9480d8d 100644
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -115,7 +115,6 @@
  * Clock Configuration
  */
 #undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			1000
 #define	CONFIG_SYS_CPUSPEED		0x210		/* 416MHz ; N=2,L=16 */
 
 /*
diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h
index de25407..8abce1b 100644
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -117,7 +117,6 @@
  * Clock Configuration
  */
 #undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			1000
 #define	CONFIG_SYS_CPUSPEED		0x161		/* 400MHz;L=1 M=3 T=1 */
 
 /*
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index 6f41ee7..9af3efd 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -297,7 +297,6 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
 #endif	/* ! __CONFIG_PCM051_H */
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
new file mode 100644
index 0000000..fc25966
--- /dev/null
+++ b/include/configs/pengwyn.h
@@ -0,0 +1,207 @@
+/*
+ * pengwyn.h
+ *
+ * Copyright (C) 2013 Lothar Felten <lothar.felten@gmail.com>
+ *
+ * based on am335x_evm.h, Copyright (C) 2011 Texas Instruments Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_PENGWYN_H
+#define __CONFIG_PENGWYN_H
+
+#define CONFIG_NAND
+#define CONFIG_SERIAL1
+#define CONFIG_CONS_INDEX		1
+
+#include <configs/ti_am335x_common.h>
+
+/* Clock Defines */
+#define V_OSCK				24000000
+#define V_SCLK				V_OSCK
+
+/* set env size */
+#define CONFIG_ENV_SIZE			0x4000
+
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"loadaddr=0x80200000\0" \
+	"fdtaddr=0x80F80000\0" \
+	"bootpart=0:2\0" \
+	"bootdir=/boot\0" \
+	"bootfile=zImage\0" \
+	"fdtfile=am335x-pengwyn.dtb\0" \
+	"console=ttyO0,115200n8\0" \
+	"optargs=\0" \
+	"mmcdev=0\0" \
+	"mmcroot=/dev/mmcblk0p2 ro\0" \
+	"mmcrootfstype=ext4 rootwait\0" \
+	"rootpath=/export/rootfs\0" \
+	"nfsopts=nolock\0" \
+	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
+		"::off\0" \
+	"mmcargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=${mmcroot} " \
+		"rootfstype=${mmcrootfstype}\0" \
+	"netargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=/dev/nfs " \
+		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
+		"ip=dhcp\0" \
+	"bootenv=uEnv.txt\0" \
+	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
+	"importbootenv=echo Importing environment from mmc ...; " \
+		"env import -t $loadaddr $filesize\0" \
+	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
+	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
+	"mmcloados=run mmcargs; " \
+		"bootz ${loadaddr} - ${fdtaddr};\0" \
+	"mmcboot=mmc dev ${mmcdev}; " \
+		"if mmc rescan; then " \
+			"echo SD/MMC found on device ${mmcdev};" \
+			"if run loadbootenv; then " \
+				"echo Loaded environment from ${bootenv};" \
+				"run importbootenv;" \
+			"fi;" \
+			"if test -n $uenvcmd; then " \
+				"echo Running uenvcmd ...;" \
+				"run uenvcmd;" \
+			"fi;" \
+			"if run loadimage; then " \
+				"run loadfdt;" \
+				"run mmcloados;" \
+			"fi;" \
+		"fi;\0" \
+	"netboot=echo Booting from network ...; " \
+		"setenv autoload no; " \
+		"dhcp; " \
+		"tftp ${loadaddr} ${bootfile}; " \
+		"tftp ${fdtaddr} ${fdtfile}; " \
+		"run netargs; " \
+		"bootz ${loadaddr} - ${fdtaddr}\0" \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
+	"nandargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=${nandroot} " \
+		"rootfstype=${nandrootfstype}\0" \
+	"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
+	"nandrootfstype=ubifs rootwait=1\0" \
+	"nandboot=echo Booting from nand ...; " \
+		"run nandargs; " \
+		"nand read ${fdtaddr} u-boot-spl-os; " \
+		"nand read ${loadaddr} kernel; " \
+		"bootz ${loadaddr} - ${fdtaddr}\0"
+#endif
+
+#define CONFIG_BOOTCOMMAND \
+	"run mmcboot;" \
+	"run nandboot;"
+
+/* NS16550 Configuration: primary UART via FDTI */
+#define CONFIG_SYS_NS16550_COM1		0x44e09000
+#define CONFIG_BAUDRATE			115200
+
+/* I2C Configuration */
+#define	CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_CMD_EEPROM
+#define CONFIG_ENV_EEPROM_IS_ON_I2C
+#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+
+/* SPL */
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_YMODEM_SUPPORT
+
+/* General network SPL */
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"
+
+/* NAND support */
+#define CONFIG_CMD_NAND
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
+					 CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
+					 10, 11, 12, 13, 14, 15, 16, 17, \
+					 18, 19, 20, 21, 22, 23, 24, 25, \
+					 26, 27, 28, 29, 30, 31, 32, 33, \
+					 34, 35, 36, 37, 38, 39, 40, 41, \
+					 42, 43, 44, 45, 46, 47, 48, 49, \
+					 50, 51, 52, 53, 54, 55, 56, 57, }
+
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	14
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+
+#define GPMC_NAND_ECC_LP_x8_LAYOUT	1
+#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:128k(SPL)," \
+					"128k(SPL.backup1)," \
+					"128k(SPL.backup2)," \
+					"128k(SPL.backup3),1792k(u-boot)," \
+					"128k(u-boot-spl-os)," \
+					"128k(u-boot-env),5m(kernel),-(rootfs)"
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
+
+/*
+ * USB configuration.  We enable MUSB support, both for host and for
+ * gadget.  We set USB0 as peripheral and USB1 as host, based on the
+ * board schematic and physical port wired to each.  Then for host we
+ * add mass storage support.
+ */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_MUSB_GADGET
+#define CONFIG_MUSB_PIO_ONLY
+#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	2
+#define CONFIG_MUSB_HOST
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
+#define CONFIG_AM335X_USB1
+#define CONFIG_AM335X_USB1_MODE MUSB_HOST
+
+#if defined(CONFIG_MUSB_HOST)
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#endif
+
+#if defined(CONFIG_SPL_BUILD)
+/* disable host part of MUSB in SPL */
+#undef CONFIG_MUSB_HOST
+/* Disable CPSW SPL support so we fit within the 101KiB limit. */
+#undef CONFIG_SPL_ETH_SUPPORT
+#endif
+
+/* Network */
+#define CONFIG_CMD_MII
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_RESET	1
+#define CONFIG_PHY_NATSEMI
+
+/* CPSW support */
+#define CONFIG_SPL_ETH_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#endif	/* ! __CONFIG_PENGWYN_H */
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 7722f7b..6276d43 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -44,7 +44,6 @@
 #undef CONFIG_SPL_NET_VCI_STRING
 #undef CONFIG_SPL_ETH_SUPPORT
 
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_ATHEROS
 
 #define CONFIG_FACTORYSET
diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h
index 53128ec..a71709b 100644
--- a/include/configs/r0p7734.h
+++ b/include/configs/r0p7734.h
@@ -140,8 +140,6 @@
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
 
 /* ENV setting */
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 0b7add7..6306d61 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -95,12 +95,25 @@
 #define CONFIG_SYS_LOAD_ADDR		0x1000000
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_PREBOOT \
+	"if load mmc 0:1 ${loadaddr} /uEnv.txt; then " \
+		"env import -t ${loadaddr} ${filesize}; " \
+	"fi"
+
+#define ENV_DEVICE_SETTINGS \
+	"stdin=serial,lcd\0" \
+	"stdout=serial,lcd\0" \
+	"stderr=serial,lcd\0"
+
 /*
  * Memory layout for where various images get loaded by boot scripts:
  *
  * scriptaddr can be pretty much anywhere that doesn't conflict with something
  *   else. Put it low in memory to avoid conflicts.
  *
+ * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
+ *   something else. Put it low in memory to avoid conflicts.
+ *
  * kernel_addr_r must be within the first 128M of RAM in order for the
  *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
  *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
@@ -116,67 +129,112 @@
  * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
  *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
  */
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"stdin=serial\0" \
-	"stderr=serial,lcd\0" \
-	"stdout=serial,lcd\0" \
+#define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00000000\0" \
+	"pxefile_addr_r=0x00100000\0" \
 	"kernel_addr_r=0x01000000\0" \
 	"fdt_addr_r=0x02000000\0" \
+	"fdtfile=bcm2835-rpi-b.dtb\0" \
 	"ramdisk_addr_r=0x02100000\0" \
-	"boot_targets=mmc0\0" \
-	\
-	"script_boot=" \
-		"if fatload ${devtype} ${devnum}:1 " \
-					"${scriptaddr} boot.scr.uimg; then " \
-			"source ${scriptaddr}; " \
-		"fi;\0" \
-	\
+
+#define BOOTCMDS_MMC \
 	"mmc_boot=" \
 		"setenv devtype mmc; " \
 		"if mmc dev ${devnum}; then " \
-			"run script_boot; " \
+			"run scan_boot; " \
 		"fi\0" \
+	"bootcmd_mmc0=setenv devnum 0; run mmc_boot;\0"
+#define BOOT_TARGETS_MMC "mmc0"
+
+#define BOOTCMDS_COMMON \
+	"rootpart=1\0" \
+	\
+	"do_script_boot="                                                 \
+		"load ${devtype} ${devnum}:${rootpart} "                  \
+			"${scriptaddr} ${prefix}${script}; "              \
+		"source ${scriptaddr}\0"                                  \
+	\
+	"script_boot="                                                    \
+		"for script in ${boot_scripts}; do "                      \
+			"if test -e ${devtype} ${devnum}:${rootpart} "    \
+					"${prefix}${script}; then "       \
+				"echo Found ${prefix}${script}; "         \
+				"run do_script_boot; "                    \
+				"echo SCRIPT FAILED: continuing...; "     \
+			"fi; "                                            \
+		"done\0"                                                  \
+	\
+	"do_sysboot_boot="                                                \
+		"sysboot ${devtype} ${devnum}:${rootpart} any "           \
+			"${scriptaddr} ${prefix}extlinux/extlinux.conf\0" \
+	\
+	"sysboot_boot="                                                   \
+		"if test -e ${devtype} ${devnum}:${rootpart} "            \
+				"${prefix}extlinux/extlinux.conf; then "  \
+			"echo Found ${prefix}extlinux/extlinux.conf; "    \
+			"run do_sysboot_boot; "                           \
+			"echo SCRIPT FAILED: continuing...; "             \
+		"fi\0"                                                    \
+	\
+	"scan_boot="                                                      \
+		"echo Scanning ${devtype} ${devnum}...; "                 \
+		"for prefix in ${boot_prefixes}; do "                     \
+			"run sysboot_boot; "                              \
+			"run script_boot; "                               \
+		"done\0"                                                  \
+	\
+	"boot_targets=" \
+		BOOT_TARGETS_MMC " " \
+		"\0" \
+	\
+	"boot_prefixes=/\0" \
+	\
+	"boot_scripts=boot.scr.uimg\0" \
 	\
-	"bootcmd_mmc0=setenv devnum 0; run mmc_boot\0" \
+	BOOTCMDS_MMC
 
 #define CONFIG_BOOTCOMMAND \
 	"for target in ${boot_targets}; do run bootcmd_${target}; done"
 
-#define CONFIG_BOOTDELAY		2
+#define CONFIG_BOOTCOMMAND \
+	"for target in ${boot_targets}; do run bootcmd_${target}; done"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_DEVICE_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	BOOTCMDS_COMMON
+
+#define CONFIG_BOOTDELAY 2
 
 /* Shell */
-#define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_MAXARGS		8
 #define CONFIG_SYS_PROMPT		"U-Boot> "
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
 #define CONFIG_COMMAND_HISTORY
-#define CONFIG_AUTO_COMPLETE
 
 /* Commands */
 #include <config_cmd_default.h>
-#define CONFIG_CMD_BOOTZ
 #define CONFIG_CMD_GPIO
 #define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
-#define CONFIG_CMD_FS_GENERIC
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT
-/* Some things don't make sense on this HW or yet */
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_SAVEENV
 
-/* Device tree support for bootm/bootz */
-#define CONFIG_OF_LIBFDT
+/* Device tree support */
 #define CONFIG_OF_BOARD_SETUP
 /* ATAGs support for bootm/bootz */
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_INITRD_TAG
 
+#include <config_distro_defaults.h>
+
+/* Some things don't make sense on this HW or yet */
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SAVEENV
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_PING
+
 #endif
diff --git a/include/configs/rut.h b/include/configs/rut.h
index d4519f9..6bddede 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -41,7 +41,6 @@
 #undef CONFIG_SPL_NET_VCI_STRING
 #undef CONFIG_SPL_ETH_SUPPORT
 
-#define CONFIG_PHY_ADDR			1
 #define CONFIG_PHY_NATSEMI
 
 #define CONFIG_FACTORYSET
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 0590d20..991c43e 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -34,6 +34,7 @@
 
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
 #define CONFIG_INITRD_TAG
 #define CONFIG_CMDLINE_EDITING
 
@@ -113,8 +114,13 @@
 
 #define CONFIG_UBIFS_OPTION	"rootflags=bulk_read,no_chk_data_crc"
 
+#define CONFIG_MISC_COMMON
+#define CONFIG_MISC_INIT_R
+
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	CONFIG_UPDATEB \
 	"updatek=" \
@@ -208,8 +214,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3)
-#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0)
+#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3)
+#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0)
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index d9e4c56..67921e9 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -124,6 +124,9 @@
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	"updateb=" \
 		"onenand erase 0x0 0x100000;" \
@@ -229,8 +232,8 @@
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
+#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7)
+#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6)
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
@@ -253,10 +256,10 @@
  */
 #define CONFIG_SOFT_SPI
 #define CONFIG_SOFT_SPI_MODE SPI_MODE_3
-#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
-#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
-#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
-#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
+#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1)
+#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3)
+#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0)
+#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3)
 
 #define SPI_DELAY udelay(1)
 #undef SPI_INIT
@@ -269,16 +272,43 @@ void universal_spi_sda(int bit);
 int universal_spi_read(void);
 #endif
 
+/* Common misc for Samsung */
+#define CONFIG_MISC_COMMON
+
+#define CONFIG_MISC_INIT_R
+
+/* Download menu - Samsung common */
+#define CONFIG_LCD_MENU
+#define CONFIG_LCD_MENU_BOARD
+
+/* Download menu - definitions for check keys */
+#ifndef __ASSEMBLY__
+#include <power/max8998_pmic.h>
+
+#define KEY_PWR_PMIC_NAME		"MAX8998_PMIC"
+#define KEY_PWR_STATUS_REG		MAX8998_REG_STATUS1
+#define KEY_PWR_STATUS_MASK		(1 << 7)
+#define KEY_PWR_INTERRUPT_REG		MAX8998_REG_IRQ1
+#define KEY_PWR_INTERRUPT_MASK		(1 << 7)
+
+#define KEY_VOL_UP_GPIO			exynos4_gpio_get(2, x2, 0)
+#define KEY_VOL_DOWN_GPIO		exynos4_gpio_get(2, x2, 1)
+#endif /* __ASSEMBLY__ */
+
+/* LCD console */
+#define LCD_BPP			LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+
 /*
  * LCD Settings
  */
 #define CONFIG_EXYNOS_FB
 #define CONFIG_LCD
 #define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
 #define CONFIG_LD9040
 #define CONFIG_EXYNOS_MIPI_DSIM
 #define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12))
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
 
 #endif	/* __CONFIG_H */
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index a6d5582..e77d06b 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -42,6 +42,7 @@
 #define CONFIG_CMD_PART
 #define CONFIG_DOS_PARTITION
 #define CONFIG_HOST_MAX_DEVICES 4
+#define CONFIG_CMD_FS_GENERIC
 
 #define CONFIG_SYS_VSNPRINTF
 
diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h
index a85eb1c..8cce34a 100644
--- a/include/configs/sansa_fuze_plus.h
+++ b/include/configs/sansa_fuze_plus.h
@@ -56,7 +56,7 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_MV_UDC		/* ChipIdea CI13xxx UDC */
+#define CONFIG_CI_UDC		/* ChipIdea CI13xxx UDC */
 #define CONFIG_USB_GADGET_DUALSPEED
 
 #define CONFIG_USB_ETHER
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index c0048ac..e6d272d 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -69,7 +69,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x08100000	      /* memtest test area   */
 #define CONFIG_SYS_MEMTEST_END		0x08F00000
 
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CPUSPEED		0x141	     /* core clock - register value  */
 
 #define CONFIG_BAUDRATE 115200
diff --git a/include/configs/shmin.h b/include/configs/shmin.h
index f8155ef..4d38f6c 100644
--- a/include/configs/shmin.h
+++ b/include/configs/shmin.h
@@ -62,7 +62,6 @@
 #define CONFIG_SYS_MONITOR_BASE		(SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
 #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	256
 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
 
 /* FLASH */
diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h
index 447f8e5..b96eea8 100644
--- a/include/configs/smdk5420.h
+++ b/include/configs/smdk5420.h
@@ -17,8 +17,6 @@
 #undef CONFIG_DEFAULT_DEVICE_TREE
 #define CONFIG_DEFAULT_DEVICE_TREE	exynos5420-smdk5420
 
-#define CONFIG_ARCH_DEVICE_TREE		exynos5420
-
 #define CONFIG_VAR_SIZE_SPL
 
 #define CONFIG_SYS_SDRAM_BASE		0x20000000
diff --git a/include/configs/snowball.h b/include/configs/snowball.h
index 9a069f3..dacb560 100644
--- a/include/configs/snowball.h
+++ b/include/configs/snowball.h
@@ -41,8 +41,6 @@
 #define CONFIG_ENV_SIZE		(8*1024)
 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 256*1024)
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* for initial data */
-
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_CMD_ENV
 #define CONFIG_CMD_SAVEENV
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 23f7ad7..c0eba37 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -17,11 +17,9 @@
 /* Ethernet driver configuration */
 #define CONFIG_MII
 #define CONFIG_DESIGNWARE_ETH
-#define CONFIG_DW_SEARCH_PHY
-#define CONFIG_DW0_PHY				1
 #define CONFIG_NET_MULTI
+#define CONFIG_PHYLIB
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
-#define CONFIG_DW_AUTONEG
 #define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */
 
 /* USBD driver configuration */
@@ -41,6 +39,15 @@
 /* I2C driver configuration */
 #define CONFIG_HARD_I2C
 #define CONFIG_DW_I2C
+#if defined(CONFIG_SPEAR600)
+#define CONFIG_SYS_I2C_BASE			0xD0200000
+#elif defined(CONFIG_SPEAR300)
+#define CONFIG_SYS_I2C_BASE			0xD0180000
+#elif defined(CONFIG_SPEAR310)
+#define CONFIG_SYS_I2C_BASE			0xD0180000
+#elif defined(CONFIG_SPEAR320)
+#define CONFIG_SYS_I2C_BASE			0xD0180000
+#endif
 #define CONFIG_SYS_I2C_SPEED			400000
 #define CONFIG_SYS_I2C_SLAVE			0x02
 
diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear6xx_evb.h
index 7f4dc58..28dddcc 100644
--- a/include/configs/spear6xx_evb.h
+++ b/include/configs/spear6xx_evb.h
@@ -37,6 +37,9 @@
 #define CONFIG_SYS_FSMC_NAND_8BIT
 #define CONFIG_SYS_NAND_BASE			0xD2000000
 
+/* Ethernet PHY configuration */
+#define CONFIG_PHY_NATSEMI
+
 /* Environment Settings */
 #define CONFIG_EXTRA_ENV_SETTINGS              CONFIG_EXTRA_ENV_USBTTY
 
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 9abfe82..9c04c23 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -83,6 +83,13 @@
 #define CONFIG_OMAP_HSMMC
 #define CONFIG_DOS_PARTITION
 
+/* GPIO banks */
+#define CONFIG_OMAP3_GPIO_2		/* GPIO32 ..63  is in GPIO bank 2 */
+#define CONFIG_OMAP3_GPIO_3		/* GPIO64 ..95  is in GPIO bank 3 */
+#define CONFIG_OMAP3_GPIO_4		/* GPIO96 ..127 is in GPIO bank 4 */
+#define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
+#define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */
+
 /* commands to include */
 #include <config_cmd_default.h>
 
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index c980023..20d4cee 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -37,7 +37,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
-#define CONFIG_SYS_HZ			1000
 
 /* Misc CPU related */
 #define CONFIG_ARCH_CPU_INIT
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h
index a3242fe..e1a3bbc 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -99,6 +99,7 @@
 	BOOTCMDS_DHCP
 
 #define CONFIG_BOOTCOMMAND \
+	"set usb_need_init; " \
 	"for target in ${boot_targets}; do run bootcmd_${target}; done"
 
 #endif
@@ -129,10 +130,15 @@
 	"stderr=serial" STDOUT_LCD "\0" \
 	""
 
+#ifndef BOARD_EXTRA_ENV_SETTINGS
+#define BOARD_EXTRA_ENV_SETTINGS
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	TEGRA_DEVICE_SETTINGS \
 	MEM_LAYOUT_ENV_SETTINGS \
-	BOOTCMDS_COMMON
+	BOOTCMDS_COMMON \
+	BOARD_EXTRA_ENV_SETTINGS
 
 #if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
 #define CONFIG_FDT_SPI
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
new file mode 100644
index 0000000..0a4541b
--- /dev/null
+++ b/include/configs/tegra124-common.h
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2013
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _TEGRA124_COMMON_H_
+#define _TEGRA124_COMMON_H_
+
+#include "tegra-common.h"
+
+/* Cortex-A15 uses a cache line size of 64 bytes */
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_TEGRA124			/* is an NVIDIA Tegra124 core */
+
+/* Environment information, boards can override if required */
+#define CONFIG_LOADADDR		0x80408000	/* def. location for kernel */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LOAD_ADDR	0x80A00800	/* default */
+#define CONFIG_STACKBASE	0x82800000	/* 40MB */
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_SYS_TEXT_BASE	0x8010E000
+
+/*
+ * Memory layout for where various images get loaded by boot scripts:
+ *
+ * scriptaddr can be pretty much anywhere that doesn't conflict with something
+ *   else. Put it above BOOTMAPSZ to eliminate conflicts.
+ *
+ * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
+ *   something else. Put it above BOOTMAPSZ to eliminate conflicts.
+ *
+ * kernel_addr_r must be within the first 128M of RAM in order for the
+ *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
+ *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
+ *   should not overlap that area, or the kernel will have to copy itself
+ *   somewhere else before decompression. Similarly, the address of any other
+ *   data passed to the kernel shouldn't overlap the start of RAM. Pushing
+ *   this up to 16M allows for a sizable kernel to be decompressed below the
+ *   compressed load address.
+ *
+ * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
+ *   the compressed kernel to be up to 16M too.
+ *
+ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
+ *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
+ */
+#define MEM_LAYOUT_ENV_SETTINGS \
+	"scriptaddr=0x90000000\0" \
+	"pxefile_addr_r=0x90100000\0" \
+	"kernel_addr_r=0x81000000\0" \
+	"fdt_addr_r=0x82000000\0" \
+	"ramdisk_addr_r=0x82100000\0"
+
+/* Defines for SPL */
+#define CONFIG_SPL_TEXT_BASE		0x80108000
+#define CONFIG_SYS_SPL_MALLOC_START	0x80090000
+#define CONFIG_SPL_STACK		0x800ffffc
+
+/* Total I2C ports on Tegra124 */
+#define TEGRA_I2C_NUM_CONTROLLERS	5
+
+/* For USB EHCI controller */
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
+
+#endif /* _TEGRA124_COMMON_H_ */
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index ba16b1c..b51400c 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -233,7 +233,6 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			1
 #define CONFIG_PHY_ET1011C
 #define CONFIG_PHY_ET1011C_TX_CLK_FIX
 
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index 91f97dd..50c3203 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -13,7 +13,6 @@
 #define __CONFIG_TI_AM335X_COMMON_H__
 
 #define CONFIG_AM33XX
-#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_SYS_CACHELINE_SIZE       64
 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
@@ -31,6 +30,7 @@
 /* Network defines. */
 #define CONFIG_CMD_NET			/* 'bootp' and 'tftp' */
 #define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
 #define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 2f0e4c0..bcb5eab 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -163,4 +163,10 @@
 #define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
+#undef CONFIG_SYS_I2C
+#undef CONFIG_SYS_I2C_OMAP24XX
+#endif
+
 #endif /* __CONFIG_TI_OMAP4_COMMON_H */
diff --git a/include/configs/trats.h b/include/configs/trats.h
index fdd8b46..718107a 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -147,15 +147,23 @@
 	""PARTS_BOOT" part 0 2;" \
 	""PARTS_ROOT" part 0 5;" \
 	""PARTS_DATA" part 0 6;" \
-	""PARTS_UMS" part 0 7\0"
+	""PARTS_UMS" part 0 7;" \
+	"params.bin mmc 0x38 0x8\0"
 
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"bootk=" \
-		"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
+		"run loaduimage;" \
+		"if run loaddtb; then " \
+			"bootm 0x40007FC0 - ${fdtaddr};" \
+		"fi;" \
+		"bootm 0x40007FC0;\0" \
 	"updatemmc=" \
 		"mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
 		"mmc boot 0 1 1 0\0" \
@@ -178,7 +186,7 @@
 	"mmcboot=" \
 		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
-		"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
+		"run bootk\0" \
 	"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
 	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
@@ -217,7 +225,6 @@
 		   "setenv spl_imgaddr;" \
 		   "setenv spl_addr_tmp;\0" \
 	"fdtaddr=40800000\0" \
-	"fdtfile=exynos4210-trats.dtb\0"
 
 
 /* Miscellaneous configurable options */
@@ -287,8 +294,8 @@
 #include <asm/arch/gpio.h>
 
 /* I2C FG */
-#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part2_get_nr(y4, 1)
-#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part2_get_nr(y4, 0)
+#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
+#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
 
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
@@ -306,16 +313,43 @@
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Common misc for Samsung */
+#define CONFIG_MISC_COMMON
+
+#define CONFIG_MISC_INIT_R
+
+/* Download menu - Samsung common */
+#define CONFIG_LCD_MENU
+#define CONFIG_LCD_MENU_BOARD
+
+/* Download menu - definitions for check keys */
+#ifndef __ASSEMBLY__
+#include <power/max8997_pmic.h>
+
+#define KEY_PWR_PMIC_NAME		"MAX8997_PMIC"
+#define KEY_PWR_STATUS_REG		MAX8997_REG_STATUS1
+#define KEY_PWR_STATUS_MASK		(1 << 0)
+#define KEY_PWR_INTERRUPT_REG		MAX8997_REG_INT1
+#define KEY_PWR_INTERRUPT_MASK		(1 << 0)
+
+#define KEY_VOL_UP_GPIO			exynos4_gpio_get(2, x2, 0)
+#define KEY_VOL_DOWN_GPIO		exynos4_gpio_get(2, x2, 1)
+#endif /* __ASSEMBLY__ */
+
+/* LCD console */
+#define LCD_BPP			LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+
 /* LCD */
 #define CONFIG_EXYNOS_FB
 #define CONFIG_LCD
 #define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
 #define CONFIG_FB_ADDR		0x52504000
 #define CONFIG_S6E8AX0
 #define CONFIG_EXYNOS_MIPI_DSIM
 #define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
 
 #define CONFIG_CMD_USB_MASS_STORAGE
 #define CONFIG_USB_GADGET_MASS_STORAGE
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 83633b0..e30c428 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -152,6 +152,9 @@
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
 /* Tizen - partitions definitions */
 #define PARTS_CSA		"csa"
 #define PARTS_BOOT		"boot"
@@ -178,11 +181,16 @@
 	""PARTS_BOOT" part 0 2;" \
 	""PARTS_ROOT" part 0 5;" \
 	""PARTS_DATA" part 0 6;" \
-	""PARTS_UMS" part 0 7\0"
+	""PARTS_UMS" part 0 7;" \
+	"params.bin mmc 0x38 0x8\0"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"bootk=" \
-		"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
+		"run loaduimage;" \
+		"if run loaddtb; then " \
+			"bootm 0x40007FC0 - ${fdtaddr};" \
+		"fi;" \
+		"bootm 0x40007FC0;\0" \
 	"updatemmc=" \
 		"mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
 		"mmc boot 0 1 1 0\0" \
@@ -196,7 +204,7 @@
 	"mmcboot=" \
 		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
-		"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
+		"run bootk\0" \
 	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
 	"verify=n\0" \
@@ -237,7 +245,6 @@
 		   "setenv spl_imgaddr;" \
 		   "setenv spl_addr_tmp;\0" \
 	"fdtaddr=40800000\0" \
-	"fdtfile=exynos4412-trats2.dtb\0"
 
 /*
  * Miscellaneous configurable options
@@ -277,7 +284,6 @@
 #define CONFIG_EFI_PARTITION
 #define CONFIG_PARTITION_UUIDS
 
-#define CONFIG_MISC_INIT_R
 #define CONFIG_BOARD_EARLY_INIT_F
 
 /* I2C */
@@ -318,16 +324,43 @@ int get_soft_i2c_sda_pin(void);
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 #define CONFIG_USB_CABLE_CHECK
 
+/* Common misc for Samsung */
+#define CONFIG_MISC_COMMON
+
+#define CONFIG_MISC_INIT_R
+
+/* Download menu - Samsung common */
+#define CONFIG_LCD_MENU
+#define CONFIG_LCD_MENU_BOARD
+
+/* Download menu - definitions for check keys */
+#ifndef __ASSEMBLY__
+#include <power/max77686_pmic.h>
+
+#define KEY_PWR_PMIC_NAME		"MAX77686_PMIC"
+#define KEY_PWR_STATUS_REG		MAX77686_REG_PMIC_STATUS1
+#define KEY_PWR_STATUS_MASK		(1 << 0)
+#define KEY_PWR_INTERRUPT_REG		MAX77686_REG_PMIC_INT1
+#define KEY_PWR_INTERRUPT_MASK		(1 << 1)
+
+#define KEY_VOL_UP_GPIO			exynos4x12_gpio_get(2, x2, 2)
+#define KEY_VOL_DOWN_GPIO		exynos4x12_gpio_get(2, x3, 3)
+#endif /* __ASSEMBLY__ */
+
+/* LCD console */
+#define LCD_BPP                 LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+
 /* LCD */
 #define CONFIG_EXYNOS_FB
 #define CONFIG_LCD
 #define CONFIG_CMD_BMP
-#define CONFIG_BMP_32BPP
+#define CONFIG_BMP_16BPP
 #define CONFIG_FB_ADDR		0x52504000
 #define CONFIG_S6E8AX0
 #define CONFIG_EXYNOS_MIPI_DSIM
 #define CONFIG_VIDEO_BMP_GZIP
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
 
 #define CONFIG_CMD_USB_MASS_STORAGE
 #define CONFIG_USB_GADGET_MASS_STORAGE
diff --git a/include/configs/tseries.h b/include/configs/tseries.h
new file mode 100644
index 0000000..8fb87ac
--- /dev/null
+++ b/include/configs/tseries.h
@@ -0,0 +1,265 @@
+/*
+ * tseries.h
+ *
+ * specific parts for B&R T-Series Motherboard
+ *
+ * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
+ * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ *
+ * SPDX-License-Identifier:        GPL-2.0+
+ */
+
+#ifndef __CONFIG_TSERIES_H__
+#define __CONFIG_TSERIES_H__
+
+#include <configs/bur_am335x_common.h>
+/* ------------------------------------------------------------------------- */
+/* Clock Defines */
+#define V_OSCK				26000000  /* Clock output from T2 */
+#define V_SCLK				(V_OSCK)
+
+#define CONFIG_POWER_TPS65217
+
+/* Support both device trees and ATAGs. */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMD_BOOTZ
+/*#define CONFIG_MACH_TYPE		3589*/
+#define CONFIG_MACH_TYPE		0xFFFFFFFF /* TODO: check with kernel*/
+
+/* MMC/SD IP block */
+#if defined(CONFIG_EMMC_BOOT)
+ #define CONFIG_MMC
+ #define CONFIG_GENERIC_MMC
+ #define CONFIG_OMAP_HSMMC
+ #define CONFIG_CMD_MMC
+ #define CONFIG_SUPPORT_EMMC_BOOT
+/* RAW SD card / eMMC locations. */
+ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /*addr. 0x60000 */
+ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS		0x200 /* 256 KB */
+ #define CONFIG_SPL_MMC_SUPPORT
+#endif /* CONFIG_EMMC_BOOT */
+
+/*
+ * When we have SPI or NAND flash we expect to be making use of mtdparts,
+ * both for ease of use in U-Boot and for passing information on to
+ * the Linux kernel.
+ */
+#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NAND)
+#define CONFIG_MTD_DEVICE		/* Required for mtdparts */
+#define CONFIG_CMD_MTDPARTS
+#endif /* CONFIG_SPI_BOOT, ... */
+
+#undef CONFIG_SPL_OS_BOOT
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_SYS_SPL_ARGS_ADDR		0x80F80000
+
+/* RAW SD card / eMMC */
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
+
+/* NAND */
+#ifdef CONFIG_NAND
+#define CONFIG_CMD_SPL_NAND_OFS			0x080000 /* end of u-boot */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS		0x140000
+#define CONFIG_CMD_SPL_WRITE_SIZE		0x2000
+#endif /* CONFIG_NAND */
+#endif /* CONFIG_SPL_OS_BOOT */
+
+#ifdef CONFIG_NAND
+#define CONFIG_SPL_NAND_AM33XX_BCH	/* OMAP4 and later ELM support */
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#endif /* CONFIG_NAND */
+
+/* Always 128 KiB env size */
+#define CONFIG_ENV_SIZE			(128 << 10)
+
+#ifdef CONFIG_NAND
+#define NANDARGS \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
+	"nandargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=${nandroot} " \
+		"rootfstype=${nandrootfstype}\0" \
+	"nandroot=ubi0:rootfs rw ubi.mtd=8,2048\0" \
+	"nandrootfstype=ubifs rootwait=1\0" \
+	"nandimgsize=0x500000\0" \
+	"nandboot=echo Booting from nand ...; " \
+		"run nandargs; " \
+		"nand read ${loadaddr} kernel ${nandimgsize}; " \
+		"bootz ${loadaddr}\0"
+#else
+#define NANDARGS ""
+#endif /* CONFIG_NAND */
+
+#ifdef CONFIG_MMC
+#define MMCARGS \
+	"silent=1\0"
+#else
+#define MMCARGS ""
+#endif /* CONFIG_MMC */
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"autoload=0\0" \
+	"loadaddr=0x80200000\0" \
+	"bootfile=zImage\0" \
+	"console=ttyO0,115200n8\0" \
+	"optargs=\0" \
+	"rootpath=/tftpboot/tseries/rootfs-small\0" \
+	"nfsopts=nolock\0" \
+	"netargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=/dev/nfs " \
+		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
+		"ip=dhcp\0" \
+	"netboot=echo Booting from network ...; " \
+		"setenv autoload no; " \
+		"dhcp; " \
+		"tftp ${loadaddr} ${bootfile}; " \
+		"run netargs; " \
+		"bootm ${loadaddr}\0" \
+	"usbupdate=echo Updating UBOOT from USB-Stick ...; " \
+		"usb start; " \
+		"fatload usb 0 0x80000000 updateubootusb.img; " \
+		"source;\0" \
+	"netupdate=echo Updating UBOOT from Network (TFTP) ...; " \
+		"setenv autoload 0; " \
+		"dhcp;" \
+		"tftp 0x80000000 updateUBOOT.img;" \
+		"source;\0" \
+	NANDARGS \
+	MMCARGS
+#endif /* !CONFIG_SPL_BUILD*/
+
+#define CONFIG_BOOTCOMMAND \
+	"run mmcboot1;"
+#define CONFIG_BOOTDELAY		1 /* TODO: für release auf 0 setzen */
+
+#ifdef CONFIG_NAND
+/*
+ * GPMC  block.  We support 1 device and the physical address to
+ * access CS0 at is 0x8000000.
+ */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x8000000
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_CMD_NAND
+/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
+#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
+#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
+					CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, \
+					10, 11, 12, 13, 14, 15, 16, 17, \
+					18, 19, 20, 21, 22, 23, 24, 25, \
+					26, 27, 28, 29, 30, 31, 32, 33, \
+					34, 35, 36, 37, 38, 39, 40, 41, \
+					42, 43, 44, 45, 46, 47, 48, 49, \
+					50, 51, 52, 53, 54, 55, 56, 57, }
+
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	14
+
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+
+#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:" \
+					"128k(SPL)," \
+					"128k(SPL.backup1)," \
+					"128k(SPL.backup2)," \
+					"128k(SPL.backup3)," \
+					"512k(u-boot)," \
+					"128k(u-boot-spl-os)," \
+					"128k(u-boot-env)," \
+					"5m(kernel),"\
+					"-(rootfs)"
+#endif /* CONFIG_NAND */
+
+/* USB configuration */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_MUSB_PIO_ONLY
+#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT
+/* attention! not only for gadget, enables also highspeed in hostmode */
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_MUSB_HOST
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE	MUSB_HOST
+#define CONFIG_AM335X_USB1
+#define CONFIG_AM335X_USB1_MODE MUSB_HOST
+
+#ifdef CONFIG_MUSB_HOST
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#endif /* CONFIG_MUSB_HOST */
+
+#if defined(CONFIG_SPI_BOOT)
+/* McSPI IP block */
+#define CONFIG_SPI
+#define CONFIG_OMAP3_SPI
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_SPEED		24000000
+
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_BUS		0
+#define CONFIG_SPL_SPI_CS		0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */
+#define CONFIG_ENV_OFFSET		(768 << 10) /* 768 KiB in */
+#define CONFIG_ENV_OFFSET_REDUND	(896 << 10) /* 896 KiB in */
+
+#elif defined(CONFIG_EMMC_BOOT)
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		1
+#define CONFIG_SYS_MMC_ENV_PART		2
+#define CONFIG_ENV_OFFSET		0x40000	/* TODO: Adresse definieren */
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#elif defined(CONFIG_NAND)
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET		0x120000 /* TODO: Adresse definieren */
+#define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_ENV_SIZE
+#else
+#error "no storage for Environment defined!"
+#endif
+/*
+ * Common filesystems support.  When we have removable storage we
+ * enabled a number of useful commands and support.
+ */
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+#define CONFIG_CMD_FS_GENERIC
+#endif /* CONFIG_MMC, ... */
+
+#endif	/* ! __CONFIG_TSERIES_H__ */
diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h
index 629299d..8d7970a 100644
--- a/include/configs/u8500_href.h
+++ b/include/configs/u8500_href.h
@@ -29,7 +29,6 @@
 #define CONFIG_ENV_SIZE		(128*1024)
 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 256*1024)
 #endif
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* for initial data */
 
 /*
  * PL011 Configuration
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index 7f09489..4f51852 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -199,7 +199,6 @@
 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
-#define CONFIG_SYS_HZ			1000
 
 #define CONFIG_CMDLINE_EDITING
 
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index c4d04de..3c54870 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -20,7 +20,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
-#define CONFIG_SYS_HZ			1000
 
 #define CONFIG_MACH_TYPE		MACH_TYPE_USB_A9263
 
diff --git a/include/configs/venice2.h b/include/configs/venice2.h
new file mode 100644
index 0000000..91808e9
--- /dev/null
+++ b/include/configs/venice2.h
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2013-2014
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/sizes.h>
+
+#include "tegra124-common.h"
+
+/* Enable fdt support for Venice2. Flash the image in u-boot-dtb.bin */
+#define CONFIG_DEFAULT_DEVICE_TREE	tegra124-venice2
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* High-level configuration options */
+#define V_PROMPT			"Tegra124 (Venice2) # "
+#define CONFIG_TEGRA_BOARD_STRING	"NVIDIA Venice2"
+
+/* Board-specific serial config */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_TEGRA_ENABLE_UARTA
+#define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTA_BASE
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* I2C */
+#define CONFIG_SYS_I2C_TEGRA
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS		TEGRA_I2C_NUM_CONTROLLERS
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+
+/* SD/MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_TEGRA_MMC
+#define CONFIG_CMD_MMC
+
+/* Environment in eMMC, at the end of 2nd "boot sector" */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define CONFIG_SYS_MMC_ENV_PART		2
+#define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
+
+/* SPI */
+#define CONFIG_TEGRA114_SPI		/* Compatible w/ Tegra114 SPI */
+#define CONFIG_TEGRA114_SPI_CTRLS	6
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED        24000000
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH_SIZE          (4 << 20)
+
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
+#include "tegra-common-post.h"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h
index 88aaa95..14c6e67 100644
--- a/include/configs/vl_ma2sc.h
+++ b/include/configs/vl_ma2sc.h
@@ -322,7 +322,6 @@
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)	/* our CLE is AD22 */
 #define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PD(15)
 #define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PB(0)
-#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 #endif
 
 /* Ethernet */
@@ -363,7 +362,6 @@
  */
 #define CONFIG_SYS_MALLOC_LEN		\
 	ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
 
 #ifndef CONFIG_RAMLOAD
 #define CONFIG_BOOTCOMMAND		"run nfsboot"
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 39540e3..7405419 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -74,10 +74,9 @@
 /* Ethernet config options */
 #define CONFIG_MII
 #define CONFIG_DESIGNWARE_ETH
-#define CONFIG_DW_SEARCH_PHY
 #define CONFIG_NET_MULTI
+#define CONFIG_PHYLIB
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
-#define CONFIG_DW_AUTONEG
 #define CONFIG_PHY_ADDR		0	/* PHY address */
 #define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */
 
@@ -86,6 +85,7 @@
 /* I2C config options */
 #define CONFIG_HARD_I2C
 #define CONFIG_DW_I2C
+#define CONFIG_SYS_I2C_BASE			0xD0200000
 #define CONFIG_SYS_I2C_SPEED			400000
 #define CONFIG_SYS_I2C_SLAVE			0x02
 #define CONFIG_I2C_CHIPADDRESS			0x50
@@ -171,7 +171,6 @@
 #define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_LOAD_ADDR			0x00800000
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_64BIT_VSPRINTF
 
 /* Use last 2 lwords in internal SRAM for bootcounter */
 #define CONFIG_BOOTCOUNT_LIMIT
diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
index 022bc95..8e6b365 100644
--- a/include/configs/xfi3.h
+++ b/include/configs/xfi3.h
@@ -55,7 +55,7 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_MV_UDC		/* ChipIdea CI13xxx UDC */
+#define CONFIG_CI_UDC		/* ChipIdea CI13xxx UDC */
 #define CONFIG_USB_GADGET_DUALSPEED
 
 #define CONFIG_USB_ETHER
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index e38fa89..41a7c99 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -138,7 +138,6 @@ unsigned char zipitz2_spi_read(void);
  * Clock Configuration
  */
 #undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CPUSPEED		0x190		/* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
 
 /*
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index e7a8e9f..14f0b90 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -35,27 +35,12 @@
 #define CONFIG_SYS_BAUDRATE_TABLE  \
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
-/* Zynq Serial driver */
-#ifdef CONFIG_ZYNQ_SERIAL_UART0
-# define CONFIG_ZYNQ_SERIAL_BASEADDR0	0xE0000000
-# define CONFIG_ZYNQ_SERIAL_BAUDRATE0	CONFIG_BAUDRATE
-# define CONFIG_ZYNQ_SERIAL_CLOCK0	50000000
-#endif
-
-#ifdef CONFIG_ZYNQ_SERIAL_UART1
-# define CONFIG_ZYNQ_SERIAL_BASEADDR1	0xE0001000
-# define CONFIG_ZYNQ_SERIAL_BAUDRATE1	CONFIG_BAUDRATE
-# define CONFIG_ZYNQ_SERIAL_CLOCK1	50000000
-#endif
-
-#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1)
-# define CONFIG_ZYNQ_SERIAL
-#endif
-
 /* DCC driver */
 #if defined(CONFIG_ZYNQ_DCC)
 # define CONFIG_ARM_DCC
 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
+#else
+# define CONFIG_ZYNQ_SERIAL
 #endif
 
 /* Ethernet driver */
@@ -104,13 +89,13 @@
 # define CONFIG_DOS_PARTITION
 #endif
 
+#define CONFIG_SYS_I2C_ZYNQ
 /* I2C */
-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
+#if defined(CONFIG_SYS_I2C_ZYNQ)
 # define CONFIG_CMD_I2C
 # define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ
 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE		1
+# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
 #endif
 
 /* EEPROM */
@@ -164,7 +149,7 @@
 		"fatload mmc 0 ${load_addr} ${fit_image} && " \
 		"bootm ${load_addr}\0" \
 	"jtagboot=echo TFTPing FIT to RAM... && " \
-		"tftp ${load_addr} ${fit_image} && " \
+		"tftpboot ${load_addr} ${fit_image} && " \
 		"bootm ${load_addr}\0"
 #define CONFIG_BOOTCOMMAND		"run $modeboot"
 #define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
@@ -178,6 +163,8 @@
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_SYS_LONGHELP
+#define CONFIG_CLOCKS
+#define CONFIG_CMD_CLK
 #define CONFIG_SYS_MAXARGS		15 /* max number of command args */
 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
@@ -221,6 +208,9 @@
 #define CONFIG_FIT_SIGNATURE
 #define CONFIG_RSA
 
+/* Extend size of kernel image for uncompression */
+#define CONFIG_SYS_BOOTM_LEN	(20 * 1024 * 1024)
+
 /* Boot FreeBSD/vxWorks from an ELF image */
 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
 # define CONFIG_API
@@ -228,11 +218,91 @@
 # define CONFIG_SYS_MMC_MAX_DEVICE	1
 #endif
 
+#define CONFIG_SYS_LDSCRIPT  "arch/arm/cpu/armv7/zynq/u-boot.lds"
+
 /* Commands */
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
+#define CONFIG_CMD_TFTPPUT
+
+/* SPL part */
+#define CONFIG_SPL
+#define CONFIG_CMD_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
+
+/* Disable dcache for SPL just for sure */
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_DCACHE_OFF
+#undef CONFIG_FPGA
+#endif
+
+/* MMC support */
+#ifdef CONFIG_ZYNQ_SDHCI0
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot.img"
+#endif
+
+/* Address in RAM where the parameters must be copied by SPL. */
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
+
+#define CONFIG_SPL_FAT_LOAD_ARGS_NAME		"system.dtb"
+#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME		"uImage"
+
+/* Not using MMC raw mode - just for compilation purpose */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
+
+/* qspi mode is working fine */
+#ifdef CONFIG_ZYNQ_QSPI
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS	0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
+#define CONFIG_SPL_SPI_CS	0
+#endif
+
+/* for booting directly linux */
+#define CONFIG_SPL_OS_BOOT
+
+/* SP location before relocation, must use scratch RAM */
+#define CONFIG_SPL_TEXT_BASE	0x0
+
+/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
+#define CONFIG_SPL_MAX_SIZE	0x30000
+
+/* The highest 64k OCM address */
+#define OCM_HIGH_ADDR	0xffff0000
+
+/* Just define any reasonable size */
+#define CONFIG_SPL_STACK_SIZE	0x1000
+
+/* SPL stack position - and stack goes down */
+#define CONFIG_SPL_STACK	(OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
+
+/* On the top of OCM space */
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_STACK + \
+					 GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x1000
+
+/* BSS setup */
+#define CONFIG_SPL_BSS_START_ADDR	0x100000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x100000
+
+#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
 
 #endif /* __CONFIG_ZYNQ_COMMON_H */
diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h
index 673660e..de0e241 100644
--- a/include/configs/zynq_zc70x.h
+++ b/include/configs/zynq_zc70x.h
@@ -2,7 +2,7 @@
  * (C) Copyright 2013 Xilinx, Inc.
  *
  * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards
- * See zynq_common.h for Zynq common configs
+ * See zynq-common.h for Zynq common configs
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h
index 412dede..274140c 100644
--- a/include/configs/zynq_zed.h
+++ b/include/configs/zynq_zed.h
@@ -2,7 +2,7 @@
  * (C) Copyright 2013 Xilinx, Inc.
  *
  * Configuration for Zynq Evaluation and Development Board - ZedBoard
- * See zynq_common.h for Zynq common configs
+ * See zynq-common.h for Zynq common configs
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
diff --git a/include/cpsw.h b/include/cpsw.h
index 743cb96..a73843d 100644
--- a/include/cpsw.h
+++ b/include/cpsw.h
@@ -19,7 +19,7 @@
 struct cpsw_slave_data {
 	u32		slave_reg_ofs;
 	u32		sliver_reg_ofs;
-	int		phy_id;
+	int		phy_addr;
 	int		phy_if;
 };
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index a02dd67..b641558 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -142,7 +142,7 @@ struct dwmci_host {
 
 	void (*clksel)(struct dwmci_host *host);
 	void (*board_init)(struct dwmci_host *host);
-	unsigned int (*get_mmc_clk)(int dev_index);
+	unsigned int (*get_mmc_clk)(struct dwmci_host *host);
 };
 
 struct dwmci_idmac {
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 2429380..aacb147 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -134,6 +134,7 @@ int ext4fs_read(char *buf, unsigned len);
 int ext4fs_mount(unsigned part_length);
 void ext4fs_close(void);
 int ext4fs_ls(const char *dirname);
+int ext4fs_exists(const char *filename);
 void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot);
 int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf);
 void ext4fs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info);
diff --git a/include/fat.h b/include/fat.h
index 2c951e7..c8eb7cc 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -188,6 +188,7 @@ file_read_func		file_fat_read;
 int file_cd(const char *path);
 int file_fat_detectfs(void);
 int file_fat_ls(const char *dir);
+int fat_exists(const char *filename);
 long file_fat_read_at(const char *filename, unsigned long pos, void *buffer,
 		      unsigned long maxsize);
 long file_fat_read(const char *filename, void *buffer, unsigned long maxsize);
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 433d6a7..19bab79 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -59,6 +59,7 @@ enum fdt_compat_id {
 	COMPAT_NVIDIA_TEGRA20_NAND,	/* Tegra2 NAND controller */
 	COMPAT_NVIDIA_TEGRA20_PWM,	/* Tegra 2 PWM controller */
 	COMPAT_NVIDIA_TEGRA20_DC,	/* Tegra 2 Display controller */
+	COMPAT_NVIDIA_TEGRA124_SDMMC,	/* Tegra124 SDMMC controller */
 	COMPAT_NVIDIA_TEGRA30_SDMMC,	/* Tegra30 SDMMC controller */
 	COMPAT_NVIDIA_TEGRA20_SDMMC,	/* Tegra20 SDMMC controller */
 	COMPAT_NVIDIA_TEGRA20_SFLASH,	/* Tegra 2 SPI flash controller */
diff --git a/include/fs.h b/include/fs.h
index 7d9403e..26de053 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -44,6 +44,13 @@ int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype);
 int fs_ls(const char *dirname);
 
 /*
+ * Determine whether a file exists
+ *
+ * Returns 1 if the file exists, 0 if it doesn't exist.
+ */
+int fs_exists(const char *filename);
+
+/*
  * Read file "filename" from the partition previously set by fs_set_blk_dev(),
  * to address "addr", starting at byte offset "offset", and reading "len"
  * bytes. "offset" may be 0 to read from the start of the file. "len" may be
@@ -55,6 +62,16 @@ int fs_ls(const char *dirname);
 int fs_read(const char *filename, ulong addr, int offset, int len);
 
 /*
+ * Write file "filename" to the partition previously set by fs_set_blk_dev(),
+ * from address "addr", starting at byte offset "offset", and writing "len"
+ * bytes. "offset" may be 0 to write to the start of the file. Note that not
+ * all filesystem types support offset!=0.
+ *
+ * Returns number of bytes read on success. Returns <= 0 on error.
+ */
+int fs_write(const char *filename, ulong addr, int offset, int len);
+
+/*
  * Common implementation for various filesystem commands, optionally limited
  * to a specific filesystem type via the fstype parameter.
  */
@@ -62,6 +79,8 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		int fstype);
 int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		int fstype);
+int file_exists(const char *dev_type, const char *dev_part, const char *file,
+		int fstype);
 int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		int fstype);
 
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index e03f9db..72c0b2e 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -14,6 +14,14 @@
 
 #include <common_timing_params.h>
 
+#ifdef CONFIG_SYS_FSL_DDR_LE
+#define ddr_in32(a)	in_le32(a)
+#define ddr_out32(a, v)	out_le32(a, v)
+#else
+#define ddr_in32(a)	in_be32(a)
+#define ddr_out32(a, v)	out_be32(a, v)
+#endif
+
 #if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM)
 /*
  * Bind the main DDR setup driver's generic names
@@ -93,6 +101,7 @@ void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr);
+void board_add_ram_info(int use_default);
 
 /* processor specific function */
 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index 16cccc7..2a36431 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -76,6 +76,7 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
 #define FSL_DDR_PAGE_INTERLEAVING	0x1
 #define FSL_DDR_BANK_INTERLEAVING	0x2
 #define FSL_DDR_SUPERBANK_INTERLEAVING	0x3
+#define FSL_DDR_256B_INTERLEAVING	0x8
 #define FSL_DDR_3WAY_1KB_INTERLEAVING	0xA
 #define FSL_DDR_3WAY_4KB_INTERLEAVING	0xC
 #define FSL_DDR_3WAY_8KB_INTERLEAVING	0xD
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index be6c107..58a6efd 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -12,6 +12,20 @@
 #include <config.h>
 #include <common.h>
 
+
+#ifdef CONFIG_SYS_FSL_IFC_LE
+#define ifc_in32(a)       in_le32(a)
+#define ifc_out32(a, v)   out_le32(a, v)
+#define ifc_in16(a)       in_le16(a)
+#elif defined(CONFIG_SYS_FSL_IFC_BE)
+#define ifc_in32(a)       in_be32(a)
+#define ifc_out32(a, v)   out_be32(a, v)
+#define ifc_in16(a)       in_be16(a)
+#else
+#error Neither CONFIG_SYS_FSL_IFC_LE nor CONFIG_SYS_FSL_IFC_BE is defined
+#endif
+
+
 /*
  * CSPR - Chip Select Property Register
  */
@@ -773,20 +787,22 @@ extern void init_early_memctl_regs(void);
 
 #define IFC_BASE_ADDR ((struct fsl_ifc *)CONFIG_SYS_IFC_ADDR)
 
-#define get_ifc_cspr_ext(i) (in_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext))
-#define get_ifc_cspr(i) (in_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr))
-#define get_ifc_csor_ext(i) (in_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext))
-#define get_ifc_csor(i) (in_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor))
-#define get_ifc_amask(i) (in_be32(&(IFC_BASE_ADDR)->amask_cs[i].amask))
-#define get_ifc_ftim(i, j) (in_be32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j]))
-
-#define set_ifc_cspr_ext(i, v) (out_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext, v))
-#define set_ifc_cspr(i, v) (out_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr, v))
-#define set_ifc_csor_ext(i, v) (out_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext, v))
-#define set_ifc_csor(i, v) (out_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor, v))
-#define set_ifc_amask(i, v) (out_be32(&(IFC_BASE_ADDR)->amask_cs[i].amask, v))
+#define get_ifc_cspr_ext(i) (ifc_in32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext))
+#define get_ifc_cspr(i) (ifc_in32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr))
+#define get_ifc_csor_ext(i) (ifc_in32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext))
+#define get_ifc_csor(i) (ifc_in32(&(IFC_BASE_ADDR)->csor_cs[i].csor))
+#define get_ifc_amask(i) (ifc_in32(&(IFC_BASE_ADDR)->amask_cs[i].amask))
+#define get_ifc_ftim(i, j) (ifc_in32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j]))
+
+#define set_ifc_cspr_ext(i, v) \
+			(ifc_out32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext, v))
+#define set_ifc_cspr(i, v) (ifc_out32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr, v))
+#define set_ifc_csor_ext(i, v) \
+			(ifc_out32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext, v))
+#define set_ifc_csor(i, v) (ifc_out32(&(IFC_BASE_ADDR)->csor_cs[i].csor, v))
+#define set_ifc_amask(i, v) (ifc_out32(&(IFC_BASE_ADDR)->amask_cs[i].amask, v))
 #define set_ifc_ftim(i, j, v) \
-			(out_be32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j], v))
+			(ifc_out32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j], v))
 
 enum ifc_chip_sel {
 	IFC_CS0,
diff --git a/include/i2c.h b/include/i2c.h
index f93a183..1b4078e 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -68,6 +68,7 @@ struct i2c_adapter {
 	uint		(*set_bus_speed)(struct i2c_adapter *adap,
 				uint speed);
 	int		speed;
+	int		waitdelay;
 	int		slaveaddr;
 	int		init_done;
 	int		hwadapnr;
diff --git a/include/image.h b/include/image.h
index 7de2bb2..6afd57b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -99,9 +99,9 @@ struct lmb;
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
-# define IMAAGE_OF_BOARD_SETUP		1
+# define IMAGE_OF_BOARD_SETUP		1
 #else
-# define IMAAGE_OF_BOARD_SETUP		0
+# define IMAGE_OF_BOARD_SETUP		0
 #endif
 
 /*
@@ -157,6 +157,7 @@ struct lmb;
 #define IH_ARCH_NDS32	        20	/* ANDES Technology - NDS32  */
 #define IH_ARCH_OPENRISC        21	/* OpenRISC 1000  */
 #define IH_ARCH_ARM64		22	/* ARM64	*/
+#define IH_ARCH_ARC		23	/* Synopsys DesignWare ARC */
 
 /*
  * Image Types
diff --git a/include/lcd.h b/include/lcd.h
index 40e8d2a..d06d6f1 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -223,6 +223,8 @@ typedef struct vidinfo {
 	unsigned int logo_on;
 	unsigned int logo_width;
 	unsigned int logo_height;
+	int logo_x_offset;
+	int logo_y_offset;
 	unsigned long logo_addr;
 	unsigned int rgb_mode;
 	unsigned int resolution;
diff --git a/include/linker_lists.h b/include/linker_lists.h
index 1eebb95..997d149 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -8,6 +8,9 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#ifndef __LINKER_LISTS_H__
+#define __LINKER_LISTS_H__
+
 /*
  * There is no use in including this from ASM files, but that happens
  * anyway, e.g. PPC kgdb.S includes command.h which incluse us.
@@ -97,9 +100,6 @@
  *   %u_boot_list_2_drivers_3
  */
 
-#ifndef __LINKER_LISTS_H__
-#define __LINKER_LISTS_H__
-
 /**
  * ll_entry_declare() - Declare linker-generated array entry
  * @_type:	Data type of the entry
diff --git a/include/mmc.h b/include/mmc.h
index 218c03f..b65ad9e 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -187,6 +187,9 @@
 #define EXT_CSD_BOOT_PART_NUM(x)	(x << 3)
 #define EXT_CSD_PARTITION_ACCESS(x)	(x << 0)
 
+#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x)	(x << 3)
+#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x)	(x << 2)
+#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x)	(x)
 
 #define R1_ILLEGAL_COMMAND		(1 << 22)
 #define R1_APP_CMD			(1 << 5)
@@ -310,8 +313,10 @@ int mmc_set_dsr(struct mmc *mmc, u16 val);
 /* Function to change the size of boot partition and rpmb partitions */
 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
 					unsigned long rpmbsize);
-/* Function to send commands to open/close the specified boot partition */
-int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
+/* Function to modify the PARTITION_CONFIG field of EXT_CSD */
+int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
+/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
+int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
 
 /**
  * Start device initialization and return immediately; it does not block on
diff --git a/include/netdev.h b/include/netdev.h
index 47fa80d..3705629 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -36,7 +36,7 @@ int calxedaxgmac_initialize(u32 id, ulong base_addr);
 int cs8900_initialize(u8 dev_num, int base_addr);
 int davinci_emac_initialize(void);
 int dc21x4x_initialize(bd_t *bis);
-int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
+int designware_initialize(ulong base_addr, u32 interface);
 int dm9000_initialize(bd_t *bis);
 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
 int e1000_initialize(bd_t *bis);
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index 16e9016..c2a772a 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -8,6 +8,8 @@
 #ifndef __MAX77686_H_
 #define __MAX77686_H_
 
+#include <power/pmic.h>
+
 enum {
 	MAX77686_REG_PMIC_ID		= 0x0,
 	MAX77686_REG_PMIC_INTSRC,
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 0e7aa31..8f282dd 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -8,7 +8,6 @@
 #ifndef __CORE_PMIC_H_
 #define __CORE_PMIC_H_
 
-#include <common.h>
 #include <linux/list.h>
 #include <i2c.h>
 #include <power/power_chrg.h>
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
new file mode 100644
index 0000000..ede6c15
--- /dev/null
+++ b/include/samsung/misc.h
@@ -0,0 +1,29 @@
+#ifndef __SAMSUNG_MISC_COMMON_H__
+#define __SAMSUNG_MISC_COMMON_H__
+
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void);
+#endif
+
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+void set_board_info(void);
+#endif
+
+#ifdef CONFIG_LCD_MENU
+enum {
+	BOOT_MODE_INFO,
+	BOOT_MODE_THOR,
+	BOOT_MODE_UMS,
+	BOOT_MODE_DFU,
+	BOOT_MODE_EXIT,
+};
+
+void keys_init(void);
+void check_boot_mode(void);
+#endif /* CONFIG_LCD_MENU */
+
+#ifdef CONFIG_CMD_BMP
+void draw_logo(void);
+#endif
+
+#endif /* __SAMSUNG_MISC_COMMON_H__ */
diff --git a/include/sandboxfs.h b/include/sandboxfs.h
index 8ea8cb7..a51ad13 100644
--- a/include/sandboxfs.h
+++ b/include/sandboxfs.h
@@ -25,6 +25,7 @@ long sandbox_fs_read_at(const char *filename, unsigned long pos,
 
 void sandbox_fs_close(void);
 int sandbox_fs_ls(const char *dirname);
+int sandbox_fs_exists(const char *filename);
 int fs_read_sandbox(const char *filename, void *buf, int offset, int len);
 int fs_write_sandbox(const char *filename, void *buf, int offset, int len);
 
diff --git a/include/spl.h b/include/spl.h
index 5e24856..a7e41da 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -16,6 +16,7 @@
 #define MMCSD_MODE_UNDEFINED	0
 #define MMCSD_MODE_RAW		1
 #define MMCSD_MODE_FAT		2
+#define MMCSD_MODE_EMMCBOOT	3
 
 struct spl_image_info {
 	const char *name;
@@ -64,6 +65,9 @@ void spl_net_load_image(const char *device);
 /* USB SPL functions */
 void spl_usb_load_image(void);
 
+/* SATA SPL functions */
+void spl_sata_load_image(void);
+
 /* SPL FAT image functions */
 int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char *filename);
 int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition);
diff --git a/include/usb/mv_udc.h b/include/usb/ci_udc.h
index f6c7b5e..0dee504 100644
--- a/include/usb/mv_udc.h
+++ b/include/usb/ci_udc.h
@@ -6,9 +6,9 @@
  */
 
 
-#ifndef __MV_UDC_H__
-#define __MV_UDC_H__
+#ifndef __CI_UDC_H__
+#define __CI_UDC_H__
 
 #define EP_MAX_PACKET_SIZE	0x200
 #define EP0_MAX_PACKET_SIZE	64
-#endif /* __MV_UDC_H__ */
+#endif /* __CI_UDC_H__ */
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
index 734c6cd..ce3dd2c 100644
--- a/include/usb/s3c_udc.h
+++ b/include/usb/s3c_udc.h
@@ -10,6 +10,7 @@
 #define __S3C_USB_GADGET
 
 #include <asm/errno.h>
+#include <asm/sizes.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/list.h>
@@ -19,7 +20,7 @@
 
 /*-------------------------------------------------------------------------*/
 /* DMA bounce buffer size, 16K is enough even for mass storage */
-#define DMA_BUFFER_SIZE	(4096*4)
+#define DMA_BUFFER_SIZE	(16*SZ_1K)
 
 #define EP0_FIFO_SIZE		64
 #define EP_FIFO_SIZE		512
@@ -81,9 +82,6 @@ struct s3c_udc {
 
 	struct s3c_plat_otg_data *pdata;
 
-	void *dma_buf[S3C_MAX_ENDPOINTS+1];
-	dma_addr_t dma_addr[S3C_MAX_ENDPOINTS+1];
-
 	int ep0state;
 	struct s3c_ep ep[S3C_MAX_ENDPOINTS];
 
diff --git a/include/zynqpl.h b/include/zynqpl.h
index 6107cbf..c81446e 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -17,6 +17,7 @@ extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
 extern int zynq_info(Xilinx_desc *desc);
 
 #define XILINX_ZYNQ_7010	0x2
+#define XILINX_ZYNQ_7015	0x1b
 #define XILINX_ZYNQ_7020	0x7
 #define XILINX_ZYNQ_7030	0xc
 #define XILINX_ZYNQ_7045	0x11
@@ -24,6 +25,7 @@ extern int zynq_info(Xilinx_desc *desc);
 
 /* Device Image Sizes */
 #define XILINX_XC7Z010_SIZE	16669920/8
+#define XILINX_XC7Z015_SIZE	28085344/8
 #define XILINX_XC7Z020_SIZE	32364512/8
 #define XILINX_XC7Z030_SIZE	47839328/8
 #define XILINX_XC7Z045_SIZE	106571232/8
@@ -33,6 +35,9 @@ extern int zynq_info(Xilinx_desc *desc);
 #define XILINX_XC7Z010_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" }
 
+#define XILINX_XC7Z015_DESC(cookie) \
+{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" }
+
 #define XILINX_XC7Z020_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" }