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| author | Stephen Warren <swarren@nvidia.com> | 2013-02-26 12:28:27 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-03-13 22:24:11 +0100 |
| commit | 0678587fb6f517d40c461f1d43fe7a6ff430f168 (patch) | |
| tree | f740ba06aaa5333ba187b291e687a03054bd936f /include | |
| parent | ef123c525370463254a6f8e67563fdb0b0b46412 (diff) | |
| download | u-boot-imx-0678587fb6f517d40c461f1d43fe7a6ff430f168.zip u-boot-imx-0678587fb6f517d40c461f1d43fe7a6ff430f168.tar.gz u-boot-imx-0678587fb6f517d40c461f1d43fe7a6ff430f168.tar.bz2 | |
ARM: implement some Cortex-A9 errata workarounds
Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.
This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions