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authorLiu Gang <Gang.Liu@freescale.com>2012-03-08 00:33:17 +0000
committerAndy Fleming <afleming@freescale.com>2012-04-24 23:58:32 -0500
commit5ffa88eca78b7260788b898b69b7d17d9508268f (patch)
tree90599d2e979845f696ffd2fce82ef44c10ad2540 /include
parent006f37f698853ca412022f80c755829f7cfa7cf2 (diff)
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powerpc/corenet_ds: Master module for boot from SRIO
For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. For the master module, need to finish these processes: 1. Initialize the SRIO port and address space. 2. Set inbound SRIO windows covered slave's u-boot image stored in master's NOR flash. 3. Master's u-boot image should be generated specifically by make xxxx_SRIOBOOT_MASTER_config 4. Master must boot first, and then slave can be powered on. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/corenet_ds.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index fd8291e..a31ccc2 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -375,6 +375,24 @@
#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */
/*
+ * SRIOBOOT - MASTER
+ */
+#ifdef CONFIG_SRIOBOOT_MASTER
+/* master port for srioboot*/
+#define CONFIG_SRIOBOOT_MASTER_PORT 0
+/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */
+/*
+ * for slave u-boot IMAGE instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull
+#endif
+
+/*
* eSPI - Enhanced SPI
*/
#define CONFIG_FSL_ESPI