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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-10-14 13:28:52 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-18 00:36:48 -0500 |
| commit | 4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f (patch) | |
| tree | b016278fbd84bfa1afd3e3fedf29dab7f82ba72e /include | |
| parent | 9c42ef61454ff7b4da23767366620a947b2486b5 (diff) | |
| download | u-boot-imx-4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f.zip u-boot-imx-4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f.tar.gz u-boot-imx-4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f.tar.bz2 | |
powerpc/85xx: Add support for RMan LIODN initialization
This patch is intended to initialize RMan LIODN related registers on
P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to
qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/P2041RDB.h | 1 | ||||
| -rw-r--r-- | include/configs/P3041DS.h | 1 | ||||
| -rw-r--r-- | include/configs/P5020DS.h | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 91c250f..337e8df 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -66,6 +66,7 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ +#define CONFIG_SYS_DPAA_RMAN /* RMan */ #define CONFIG_FSL_LAW /* Use common FSL init code */ diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index e4d1fe5..57d5de5 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -35,6 +35,7 @@ #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 +#define CONFIG_SYS_DPAA_RMAN #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 618d1a4..a9cee23 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -36,6 +36,7 @@ #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_FSL_RAID_ENGINE +#define CONFIG_SYS_DPAA_RMAN #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ |